SMPS Capacitors Chip Assemblies
CH/CV - Radial, Dual-in-Line,
4 Terminal/SMT ‘J’ & ‘L’ Ranges
European Preferred Styles
10nF to 180 µF
BS9100 approved
50V to 500 VDC
Low ESR/ESL
-55ºC to +125ºC
1B/C0G and 2C1/X7R Dielectrics
This range allows SMPS engineers to select the best
volumetric solution for input and output filter applications
in high reliability designs. Utilizing advanced multilayer
ceramic techniques to minimize ESR/ESL giving high
current handling properties appropriate for filtering,
smoothing and decoupling circuits.
ELECTRICAL SPECIFICATIONS
Temperature Coefficient
CECC 30 000, (4.24.1)
1B/C0G: A Temperature Coefficient - 0 ± 30 ppm/ºC, -55º to +125ºC
2C1/X7R: C Temperature Characteristic - ± 15%, -55º to +125ºC
Capacitance Test 25ºC
1B/C0G: Measured at 1 VRMS max at 1KHz (1MHz for 100 pF or less)
2C1/X7R: Measured at 1 VRMS max at 1KHz
Dissipation Factor 25°C
1B/C0G: 0.15% max at 1KHz, 1 VRMS max (1MHz for 100 pF or less)
2C1/X7R: 2.5% max at 1KHz, 1 VRMS max
Insulation Resistance 25°C
1B/C0G & 2C1/X7R: 100K megohms or 1000 megohms-µF, whichever
is less
Dielectric Withstanding Voltage 25°C
(Flash Test)
1B/C0G & 2C1/X7R: 250% rated voltage for 5 seconds with 50 mA max
charging current. (500 Volt units @ 150% rated voltage)
Life Test
(1000 hrs) CECC 30 000 (4.23)
1B/C0G & 2C1/X7R: 200% rated voltage at +125ºC.
(500 Volt units @ 120% rated voltage)
Damp Heat
IEC 68-2-3, 56 days.
Thermal Shock
IEC 68-2-14
-55ºC to +125ºC, 5 cycles
Resistance to Solder Heat
IEC 68-2-20
Vibration
IEC 68-2-6
10Hz - 2000Hz, 0.75mm or 98m/sec
2
, 6 hrs.
Bump
IEC 68-2-29
390m/sec
2
, 4000 bumps
MARKING
CH and CV 4x, 5x, 81-84
A5C
225K
xxxxxx
Top line A (AVX). Voltage code, dielectric code.
Middle line capacitance code, tolerance code.
Bottom line 6 digit batch code.
Other CH, CV Styles
AVX
5C
156M
xxxxxx
Top line AVX.
Second line voltage code, dielectric code.
Third line capacitance code, tolerance code.
Bottom line, 6 digit batch code.
111
AVX [ AVX CORPORATION ]
