Typical Characteristics All typical values are at T = 25°C, V = 5 V, unless otherwise specified.
A
CC
Parameter
Symbol
Typ.
Units
Conditions
Fig.
Note
IHYS
1.2
mA
IHYS = ITH+ - ITH-
Hysteresis
1
V
1.1
V
V
VHYS = VTH+ - V
TH-
HYS
Input Clamp Voltage
V
-0.76
V = V - V ; V = GND;
ILC 2 3 3
ILC
I = -10 mA
IN
Bridge Diode
V
0.62
I = 3 mA (see schematic)
D1,2
IN
Forward Voltage
V
0.73
1012
D3,4
Input-Output Resistance
Input-Output Capacitance
Input Capacitance
R
Ω
V = 500 Vdc
I-O
I-O
9
C
2.0
50
pF
pF
f = 1 MHz, V = 0 Vdc
I-O
I-O
C
f = 1 MHz; V = 0 V,
IN
IN
Pins 2 & 3, Pins 1 & 4 Open
Output Rise Time
(10-90%)
tr
tf
10
µs
µs
7
7
Output Fall Time
(90-10%)
0.5
Notes:
level is the maximum tolerable dVCM/ dt of
the common mode voltage, VCM, to ensure
that the output will remain in a Logic Low
state (i.e., VO < 0.8 V). See Figure 8.
under the conditions of VIN ≥ VTH+ as well
as the range of VIN > VTH – once VIN has
exceeded VTH+. Logic high output level at
1. Maximum operating frequency is defined
when output waveform (Pin 6) attains only
90% of VCC with RL = 1.8 kΩ, CL = 15 pF
using a 5 V square wave input signal.
2. Measured at a point 1.6 mm below seating
plane.
3. Current into/ out of any single lead.
4. Surge input current duration is 3 ms at 120
Hz pulse repetition rate. Transient input
current duration is 10 µs at 120 Hz pulse
repetition rate. Note that maximum input
power, PIN, must be observed.
Pin 6 occurs under the conditions of V
≤
IN
14. In applications where dVCM/ dt may exceed
50,000 V/ µs (such as static discharge), a
series resistor, RCC, should be included to
protect the detector IC from destructively
high surge currents. The recommended
value for RCC is 240 Ω per volt of allowable
V
TH- as well as the range of VIN < V
TH+
once VIN has decreased below V
.
TH-
8. The ac voltage is instantaneous voltage.
9. Device considered a two terminal device:
Pins 1, 2, 3, 4 connected together, Pins 5,
6, 7 8 connected together.
10. This is a momentary withstand test, not an
operating condition.
11. The tPHL propagation delay is measured
from the 2.5 V level of the leading edge of
a 5.0 V input pulse (1 µs rise time) to the
1.5 V level on the leading edge of the
output pulse (see Figure 7).
drop in VCC (between Pin 8 and V ) with a
CC
minimum value of 240 Ω.
15. D and D are Schottky diodes; D and D
4
1
2
3
5. Derate linearly above 100°C free-air
temperature at a rate of 4.26 mW/ °C.
Maximum input power dissipation of 195
mW allows an input IC junction
are zener diodes.
16. Standard parts receive 100% testing at
25°C (Subgroups 1 and 9). SMD,
Class H and Class K parts receive 100%
temperature of 150°C at an ambient
testing at 25, 125, and -55°C (Subgroups 1
and 9, 2 and 10 ,3 and 11, respectively.)
17. Parameters shall be tested as part of
device initial characterization and after
process changes. Parameters shall be
guaranteed to the limits specified for all
lots not specifically tested.
12. The tPLH propagation delay is measured
from the 2.5 V level of the trailing edge of a
5.0 V input pulse (1 µs fall time) to the 1.5
V level on the trailing edge of the output
pulse (see Figure 7).
temperature of T = 125°C with a typical
thermal resistance from junction to
ambient of θJAi = 235°C/ W. The typical
thermal resistance from junction to case is
A
equal to 170°C/ W. Excessive PIN and T
J
13. Common mode transient immunity in Logic
may result in device degradation.
High level is the maximum tolerable dV
CM/
6. The 1.8 kΩ load represents 1 TTL unit load
of 1.6 mA and the 4.7 kΩ pull-up resistor.
7. Logic low output level at Pin 6 occurs
dt of the common mode voltage, VCM, to
ensure that the output will remain in a
Logic High state (i.e., V > 2.0 V). Common
O
mode transient immunity in Logic Low
7
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