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AS5C2568CW-20L/883C 参数 Datasheet PDF下载

AS5C2568CW-20L/883C图片预览
型号: AS5C2568CW-20L/883C
PDF下载: 下载PDF文件 查看货源
内容描述: 32K ×8 SRAM SRAM存储器阵列 [32K x 8 SRAM SRAM MEMORY ARRAY]
分类和应用: 存储静态存储器
文件页数/大小: 16 页 / 141 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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SRAM  
MT5C2568  
AS5C2568  
Austin Semiconductor, Inc.  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(Note 5) (-55oC < TC < 125oC or -40oC to +85oC;VCC = 5.0V +10%)  
-12  
-15  
-20  
-25  
-35  
-45  
DESCRIPTION  
READ CYCLE  
SYM  
UNITS NOTES  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX  
READ cycle time  
12  
15  
20  
25  
35  
45  
ns  
ns  
ns  
ns  
tRC  
tAA  
tACE  
tOH  
Address access time  
12  
12  
15  
15  
20  
20  
25  
25  
35  
35  
45  
45  
Chip enable access time  
Output hold from address change  
Chip enable to output in Low-Z  
Chip disable to output in High-Z  
Output enable to access time  
Output enable to output in Low-Z  
2
2
3
3
3
3
3
3
3
3
3
3
ns  
ns  
ns  
ns  
ns  
7
tLZCE  
tHZCE  
tAOE  
tLZOE  
tHZOE  
7
6
10  
8
10  
10  
15  
15  
35  
20  
20  
20  
6, 7  
0
0
0
0
2
0
Output disable to output in High-Z  
WRITE CYCLE  
7
10  
10  
15  
35  
20  
6
WRITE cycle time  
12  
10  
10  
0
15  
12  
12  
0
20  
15  
15  
0
25  
20  
20  
0
35  
30  
30  
0
45  
40  
40  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tWC  
tCW  
tAW  
Chip enable to end of write  
Address valid to end of write  
Address setup time  
tAS  
Address hold from end of write  
WRITE pulse width  
2
0
0
0
0
0
tAH  
10  
8
12  
10  
0
15  
10  
0
20  
15  
0
30  
20  
0
40  
20  
3
tWP  
Data setup time  
tDS  
Data hold time  
0
tDH  
Write disable to output in Low-Z  
Write enable to output in High-Z  
0
0
0
3
3
3
7
tLZWE  
tHZWE  
7
10  
10  
15  
35  
20  
6, 7  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
MT5C2568 / AS5C2568  
Rev. 4.5 06/05  
4
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