098765432109876543216
10987654321098765482
937
109876543210987654316
09876543210987654322154321
987
10987654321098765432154321
09876543210987654321154321
9876
109876543210987654326
09876543210987654321154321
987
098765432109876543216
10987654321098765482
937
10987654321098765431154321
09876543210987654322154321
987
10987654321098765432154321
09876543210987654321154321
9876
109876543210987654326
098765432109876543216
987
t
AH
8765409876543210987654321
021
8765139876543210987654321
132176543210987654321
409876543210987654321
098
8765432176543210987654321
109876543210987654321
098
8765432176543210987654321
109876543210987654321
098
8765439876543210987654321
021
098
109876543210987654321
098
8765139876543210987654321
439876543210987654321
102176543210987654321
021
8765109876543210987654321
409876543210987654321
8765432176543210987654321
t
AW
ADDR
WRITE CYCLE TIMING (WE\ CONTROLLED, OE\ = LOW)
ADDR
D
OUT
D
OUT
CE\
1
CE\
1
OE\
CE
2
CE
2
NOTES:
1. CE\ is HIGH for READ cycle.
2. At any given temperature and voltage condition, t
HZCE
is less than t
LZCE
.
NOTE:
1. CE\ is HIGH for READ cycle.
Austin Semiconductor, Inc.
High-Z
PREVIOUS DATA VALID
READ CYCLE TIMING 2
(1)
READ CYCLE TIMING 1
(1)
t
LZCE
t
AS
54321
54321
54321
54321
D
OUT
4321
4321
4321
4321
AS5C1008
Rev. 3.5 1/01
WE\
D
IN
t
LZOE
t
OH
t
ACE
t
AOE
6
t
HZWE
t
AA
t
RC
t
WC
t
RC
t
CW
t
WP2
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
DATA VALID
t
DS
DATA VALID
High-Z
DATA VALID
t
HZCE
t
DH
t
LZWE
t
HZCE(2)
UNDEFINED
DON’T CARE
AS5C1008
SRAM
AUSTIN [ AUSTIN SEMICONDUCTOR ]
