SRAM
Austin Semiconductor, Inc.
AS5C1008
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C<T
A
<+125
o
C or -40
o
C to +85
o
C; Vcc = 5V+10%)
PARAMETER
Dynamic Operating
Current
TTL Standby Current -
TTL Inputs
CONDITIONS
Vcc=MAX, I
OUT
= 0mA,
CE
1
= V
IL
and CE
2
= V
IH
, f = fmax
Vcc=MAX, V
IN
= V
IH
or V
IL
,
CE\
1
> V
IH
and CE
2
> V
IL
, f = fmax
Vcc=MAX, CE\
1
> Vcc -0.2V, or CE
2
I
SB2
I
LI
I
LO
V
OH
V
OL
V
IH
V
IL
2.2
-0.5
-10
-10
2.4
0.4
Vcc
+0.5
0.8
2.2
10
10
10
mA
µA
µA
V
0.4
2.2
-0.5
Vcc
+0.5
0.8
V
V
V
-15
-20
-25
SYMBOL MIN MAX MIN MAX MIN MAX UNITS
I
CC1
I
SB1
180
150
140
mA
90
75
70
mA
CMOS Standby Current -
< 0.2V, V
IN
> Vcc -0.2V and
CMOS Inputs
V
IN
< 0.2V, f = 0
Input Leakage Current
Output Leakage Current
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
GND < V
IN
< Vcc
GND < V
OUT
< Vcc
Output Disabled
Vcc = MIN, I
OH
= -4.0 mA
Vcc = MIN, I
OL
= 8.0 mA
10
10
-10
-10
2.4
10
10
-10
-10
2.4
10
10
0.4
Vcc
+0.5
-0.5 0.8
PIN DESCRIPTIONS
A0 - A16: Address Inputs
These 17 address inputs select one of the 131,072 8-bit words in
the RAM.
CE\
1
: Chip Enable 1 Input
CE\
1
is asserted LOW to read from or write to the device. If Chip
Enable 1 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
CE
2
: Chip Enable 2 Input
CE
2
is asserted HIGH to read from or write to the device. If Chip
Enable 2 is deasserted, the device is deselected and is in standby
power mode. The I/O pins will be in the high-impedance state
when the device is deselected.
OE\: Output Enable Input
The Output Enable Input is asserted LOW. If asserted LOW
while CE\
1
is asserted (LOW) and CE
2
is asserted (HIGH) and
WE\ is deasserted (HIGH), data from the SRAM will be present
on the I/O pins. The I/O pins will be in the high-impedance
state when OE\ is deasserted.
WE\: Write Enable Input
The Write Enable input is asserted LOW and controls read and
write operations. When CE\
1
and WE\ are both asserted (LOW)
and CE
2
is asserted (HIGH) input data present on the I/O pins
will be written into the selected memory location.
AS5C1008
Rev. 3.6 6/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
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