AS58LC1001DCJ-25/883C 参数 Datasheet PDF下载

EEPROM

Austin Semiconductor, Inc.

AS58LC1001

FUNCTIONAL BLOCK DIAGRAM

Vcc

Vss

I/O0

High Voltage Generator

I/O7

Ready/Busy

OE\

I/O Buffer

and

Input Latch

CE\

WE\

RES\

Control Logic and Timing

A0

Y Gating

A6

Y Decoder

Address

Buffer and

Latch

X Decoder

A7

A16

Memory Array

Data Latch

MODE SELECTION

MODE

READ

STANDBY

WRITE

DESELECT

WRITE

INHIBIT

DATA

POLLING

PROGRAM

AS58LC1001

Rev. 1.0 12/08

CE\

V

IL

V

IH

V

IL

V

IL

X

X

V

IL

X

OE\

V

IL

X

V

IH

V

IH

X

V

IL

V

IL

X

WE\

V

IH

X

V

IL

V

IH

V

IH

X

V

IH

X

RES\

V

H

X

V

H

V

H

X

X

V

H

V

IL

RDY/BUSY\

High-Z

High-Z

High-Z

High-Z

---

---

V

OL

High-Z

I/O

D

OUT

High-Z

D

IN

High-Z

---

---

Data Out

(I/O7)

High-Z

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

2