EEPROM
Austin Semiconductor, Inc.
AS58C1001
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
High Voltage Generator
I/O0
I/O7
Ready/Busy
OE\
I/O Buffer
and
Input Latch
Control Logic and Timing
CE\
WE\
RES\
A0
A6
Y Decoder
Y Gating
Address
Buffer and
Latch
X Decoder
A7
A16
Memory Array
Data Latch
MODE SELECTION
MODE
READ
STANDBY
WRITE
DESELECT
WRITE
INHIBIT
DATA
POLLING
PROGRAM
Notes:
1. RDY/Busy\ output has only active LOW V
OL
and HIGH impedance state. It can not go to HIGH (V
OH
) state.
AS58C1001
Rev. 4.0 3/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
CE\
V
IL
V
IH
V
IL
V
IL
X
X
V
IL
X
OE\
V
IL
X
V
IH
V
IH
X
V
IL
V
IL
X
WE\
V
IH
X
V
IL
V
IH
V
IH
X
V
IH
X
RES\
V
H
X
V
H
V
H
X
X
V
H
V
IL
RDY/BUSY\
High-Z
High-Z
1
I/O
D
OUT
High-Z
D
IN
High-Z
---
---
Data Out
(I/O7)
High-Z
High-Z to V
OL
High-Z
---
---
V
OL
High-Z
2
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