DAC
AS5181
Austin Semiconductor, Inc.
POWER-DOWN MODE SELECTION
PD
DACEN
POWER-DOWN MODE
OUTPUT STATE
(POWER-DOWN SELECT) (DAC ENABLE)
0
0
1
0
1
X
Standꢁy
Wake-Up
Shutdown
High-Z
Last state prior to standꢁy mode
High-Z
X = Don’t Care
FIGURE 3: AS5181 with External Reference
Offset Error
APPLICATIONS INFORMATION
Offset error (Figure 5c) is the difference between the ideal
and the actual offset point. For a DAC, the offset point is the
step value when the digital input is zero. This error affects all
codes by the same amount and can usually be compensated by
trimming.
Static and Dynamic Performance
Definitions
Integral Nonlinearity
Gain Error
Integral nonlinearity (INL) (Figure 5a) is the deviation of
the values on an actual transfer function from either a best-
straight-line fit (closest approximation to the actual transfer
curve) or a line drawn between the endpoints of the transfer
function once offset and gain errors have been nullified. For a
DAC, the deviations are measured every single step.
Gain error (Figure 5d) is the difference between the ideal
and the actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope of the
transfer function and corresponds to the same percentage error
in each step.
Settling Time
Differential Nonlinearity
Settling time is the amount of time required from the start of
a transition until the DAC output settles its new output value
to within the converter’s specified accuracy.
Differential nonlinearity (DNL) (Figure 5b) is the difference
between an actual step height and the ideal value of 1LSB. A
DNL error specification of less than 1LSB guarantees no
missing codes and a monotonic transfer function.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS5181
Rev. 0.3 6/05
10
AUSTIN [ AUSTIN SEMICONDUCTOR ]
