SDRAM
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
4 Meg x 16 SDRAM
AS4SD4M16
CKE
CLK
CS\
WE\
CAS\
RAS\
CONTROL
LOGIC
COMMAND
DECODE
BANK1
BANK2 BANK3
MODE REGISTER
REFRESH
12
COUNTER
12
1
2
ROW
ADDRESS
MUX
12
12
BANK0
ROW-
ADDRESS
LATCH &
DECODER
4096
BANK 0
MEMORY
ARRAY
(4,096 X 256 X 16)
SENSE AMPLIFIERS
4096
2
2
DQML, DQMH
16
DATA
OUTPUT
REGISTER
16
DQ0-DQ15
2
A0,
A10,
BA
14
ADDRESS
REGISTER
2
BANK
CONTROL
LOGIC
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
256
(X16)
COLUMN
DECODER
16
DATA
INPUT
REGISTER
8
COLUMN-
ADDRESS
COUNTER/
LATCH
8
AS4SD4M16
Rev. 1.5 10/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4