AUSTIN SEMICONDUCTOR, INC.
AS4LC1M16 883C
1 MEG x 16 DRAM
PRELIMINARY
BYTE ACCESS CYCLE
The BYTE WRITEs and BYTE READs are determined by
the use of
?
C
?
A
/
S
/
L and
?
C
?
A
/
S
?
H. Enabling
?
C
?
A
/
S
/
L will select a
lower BYTE access (DQ1-DQ8). Enabling
?
C
?
A
/
S
?
H will select
an upper BYTE access (DQ9-DQ16). Enabling both
?
C
?
A
/
S
/
L
and
?
C
?
A
/
S
?
H selects a WORD WRITE cycle.
The AS4LC1M16 may be viewed as two 1 Meg x 8
DRAMs that have common input controls, with the excep-
tion of the
/ ?
C
?
A
/
S inputs. Figure 3 illustrates the BYTE WRITE
and WORD WRITE cycles.
Additionally, both bytes must always be of the same
mode of operation if both bytes are active. A
?
C
?
A
/
S precharge
must be satisfied prior to changing modes of operation
between the upper and lower bytes. For example, an EARLY
WRITE on one byte and a LATE WRITE on the other byte is
not allowed during the same cycle. However, an EARLY
WRITE on one byte and, after a
?
C
?
A
/
S precharge has been
satisfied, a LATE WRITE on the other byte is permissable.
REFRESH
Preserve correct memory cell data by maintaining power
and executing a
?
R
?
A
/
S cycle (READ, WRITE) or
?
R
?
A
/
S refresh
cycle (?R
?
A
/
S ONLY, CBR, or HIDDEN) so that all 1,024
combinations of RAS addresses are executed at least every
? ? /
16ms, regardless of sequence. The CBR REFRESH cycle will
invoke the refresh counter for automatic
?
R
?
A
/
S addressing.
WORD WRITE
RAS
LOWER BYTE WRITE
CASL
CASH
WE
STORED
DATA
1
1
INPUT
DATA
0
0
1
0
0
0
0
0
INPUT
DATA
STORED STORED
DATA
DATA
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
INPUT
DATA
1
1
0
1
1
1
1
1
INPUT
DATA
STORED
DATA
1
1
0
1
1
1
1
1
LOWER BYTE
(DQ1-DQ8)
OF WORD
0
1
1
1
1
1
0
X
X
X
X
X
X
X
X
1
0
1
0
1
1
1
1
1
0
1
0
1
1
1
1
1
0
1
0
1
1
1
1
X
X
X
X
X
X
X
X
ADDRESS 1
1
0
1
0
1
1
1
1
UPPER BYTE
(DQ9-DQ16)
OF WORD
1
0
1
0
0
0
0
ADDRESS 0
X = NOT EFFECTIVE (DON'T CARE)
Figure 3
WORD AND BYTE WRITE EXAMPLE
AS4LC1M16
REV. 3/97
DS000020
2-96
Austin Semiconductor, Inc., reserves the right to change products or specifications without notice.
AUSTIN [ AUSTIN SEMICONDUCTOR ]
