iPEM
2.4Gb SDRAM-DDR
AS4DDR32M72PBG1
Austin Semiconductor, Inc.
DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (NOTES 1,6)
VCC, VCCQ = +2.5V 0.2V; -55ꢀC 0.2V, -55ꢀC TA +125ꢀC
Parameter / Condition
Symbol
Min
Max
Units
VCC
Supply Voltage
2.3
2.7
V
VCCQ
II
I/O Supply Voltage
2.3
-2
2.7
2
V
Input Leakage Current: Any input 0V VIN VCC (All other pins not under test = 0V)
Input Leakage Address Current (All other pins not under test = 0V)
Output Leakage Current: I/O's are disabled; 0V VOUT VCC
Output Levels: Full drive option
µA
µA
µA
II
-10
-5
10
5
IOZ
IOH
IOL
-12
12
-9
-
-
-
-
mA
mA
mA
High Current (VOUT = VCCQ - 0.373V, minimum VREF, minimum VTT
)
Low Current (VOUT = 0.373V, maximum VREF, maximum VTT
Output Levels: Reduced drive option
)
IOHR
High Current (VOUT = VCCQ - 0.763V, minimum VREF, minimum VTT
)
Low Current (VOUT = 0.763V, maximum VREF, maximum VTT
I/O Reference Voltage (6)
)
IOLR
VREF
VTT
9
mA
V
0.49 x VCCQ 0.51 x VCCQ
VREF - 0.04 VREF + 0.04
I/O Termination Voltage (53)
V
AC INPUT OPERATING CONDITIONS (NOTES 1,6)14, 28, 40
VCC, VCCQ = +2.5V 0.2V; -55ꢀC 0.2V, -55ꢀC TA +125ꢀC
Parameter / Condition
Symbol
Min
Max
Units
V
IH (AC) VREF + 0.310
Input High (Logic 1) Voltage:
-
V
V
V
IL (AC)
VREF - 0.310
Input Low (Logic ) Voltage:
-
ICC SPECIFICATIONS AND CONDITIONS (NOTES 1-5, 10, 12, 14)
VCC, VCCQ = +2.5V 0.2V; -55ꢀC 0.2V, -55ꢀC TA +125ꢀC
Max
333, 266
Symbol 250 Mbps 200 Mbps Units
Parameter / Condition
OPERATING CURRENT: One bank, Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM, and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles; (22, 48)
ICC0
625
600
mA
OPERATING CURRENT: One bank, Active-Read- Precharge; Burst=2; tRC = tRC (MIN); tCK = tCK (MIN); IOUT = 0mA; Address and control inputs
changing once every two clock cycles; (22, 48)
ICC1
850
20
775
20
mA
mA
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; Power-down mode; tCK=tCK (MIN); CKE=LOW; (23, 32. 50)
ICC2P
IDLE STANDBY CURRENT: CS#=HIGH, All banks idle; tCK=tCK (MIN); CKE=HIGH; Address and other control inputs changing once per clock
cycle. VIN=VREF for DQ, DQS and DM (51)
ICC2F
ICC3P
225
150
225
150
mA
mA
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; Power-down mode; tCK=tCK (MIN); CKE=LOW (23, 32, 50)
ACTIVE STANDBY CURRENT: CS#=HIGH; CKE=HIGH; One bank; Active Precharge; tRC=tRAS (MAX); tCK=tCK (MIN); DQ, DM and DQS inputs
changin twicer per clock cycle; Address and other control inputs changing once per clock cycle (22)
ICC3N
250
925
250
925
mA
mA
OPERATING CURRENT: Burst=2; Reads; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK
(MIN); IOUT=0mA (22,48)
ICC4R
OPERATING CURRENT: Burst=2; Writes; Continuous burst; One bank active; Address and control inputs changing once per clock cycle; tCK=tCK
(MIN); DQ, DM and DQS inputs changin twice per clock cycle (22)
ICC4W
ICC5
ICC5A
ICC6
800
1225
30
800
1225
30
mA
mA
mA
mA
t
REF=tRC (MIN) (27, 50)
AUTO REFRESH CURRENT
tREF=7.8125 µs (27, 50)
Standard (11)
SELF REFRESH CURRENT: CKE 0.2V
20
20
OPERATING CURRENT: Four bank interleaving DEADs (BL=4) with auto precharge, tRC=tRC (MIN); tCK=tCK (MIN); Addresses and control inputs
change only during Active READ or WRITE commands. (22, 49)
ICC7
2000
2000
mA
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4DDR32M72PBG1
Rev. 0.1 06/09
11
AUSTIN [ AUSTIN SEMICONDUCTOR ]
