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AS4DDR264M64PBG1R-38/ET 参数 Datasheet PDF下载

AS4DDR264M64PBG1R-38/ET图片预览
型号: AS4DDR264M64PBG1R-38/ET
PDF下载: 下载PDF文件 查看货源
内容描述: 64Mx64 DDR2 SDRAM W /共享控制总线集成塑封微电路 [64Mx64 DDR2 SDRAM w/ SHARED CONTROL BUS iNTEGRATED Plastic Encapsulated Microcircuit]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 28 页 / 243 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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iPEM  
4.2 Gb SDRAM-DDR2  
Austin Semiconductor, Inc.  
AS4DDR264M64PBG1  
READ COMMAND  
The READ command is used to initiate a burst read access  
to an active row. The value on the BA2–BA0 inputs selects  
the bank, and the address provided on inputs A0–i (where  
i = A9) selects the starting column location. The value on  
input A10 determines whether or not auto precharge is used.  
If auto precharge is selected, the row being accessed will  
be precharged at the end of the READ burst; if auto precharge  
is not selected, the row will remain open for subsequent  
accesses.  
FIGURE 11 - READ COMMAND  
READ OPERATION  
READ bursts are initiated with a READ command. The starting  
column and bank addresses are provided with the READ  
command and auto precharge is either enabled or disabled  
for that burst access. If auto precharge is enabled, the row  
being accessed is automatically precharged at the  
completion of the burst. If auto precharge is disabled, the  
row will be left open after the completion of the burst.  
CK#  
CK  
CKE  
CS#  
During READ bursts, the valid data-out element from the  
starting column address will be available READ latency (RL)  
clocks later. RL is defined as the sum of AL and CL; RL = AL  
+ CL. The value for AL and CL are programmable via the MR  
and EMR commands, respectively. Each subsequent data-  
out element will be valid nominally at the next positive or  
negative clock edge (i.e., at the next crossing of CK and  
CK#).  
RAS#  
CAS#  
WE#  
ADDRESS  
Col  
DQS/DQS# is driven by the DDR2 SDRAM along with output  
data. The initial LOW state on DQS and HIGH state on DQS#  
is known as the read preamble (tRPRE). The LOW state on  
DQS and HIGH state on DQS# coincident with the last data-  
out element is known as the read postamble (tRPST).  
ENABLE  
A10  
AUTO PRECHARGE  
BANK ADDRESS  
DISABLE  
Bank  
Upon completion of a burst, assuming no other commands  
have been initiated, the DQ will go High-Z.  
DON’T CARE  
Data from any READ burst may be concatenated with data  
from a subsequent READ command to provide a continuous  
flow of data. The first data element from the new burst follows  
the last element of a completed burst. The new READ  
command should be issued x cycles after the first READ  
command, where x equals BL / 2 cycles.  
Austin Semiconductor, Inc.  
Austin, Texas 512.339.1188 www.austinsemiconductor.com  
AS4DDR264M64PBG1  
Rev. 0.5 06/08  
16  
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