AUSTIN SEMICONDUCTOR, INC.
SOLID STATE DISK
AS3SSD4GB8PBG
AS3SSD8GB8PBG
AS3SSD16GB5PBG
PRELIMINARY
Austin Semiconductor, Inc.
SIGNAL DESCRIPTIONS
Symbol
IDE_A0
Type
Output
Output
Output
Description
Address bus
IDE_A1
IDE_A2
IDE_D0
IDE_D1
IDE_D2
IDE_D3
IDE_D4
IDE_D5
IDE_D6
IDE_D7
IDE_D8
IDE_D9
IDE_D10
IDE_D11
IDE_D12
IDE_D13
IDE_D14
IDE_D15
IDE_INTRQ
Input/Output Data bus. The signals D15..D0 represent the bidirectional
data bus; active high signals a "one".
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Input/Output
Output
Drive interrupt request.
I/O Data Write Enable is the strobe signal asserted by the
host to write device registers or the data port.
DIOW shall be negated by the host prior to the initiation of
an Ultra DMA burst. STOP shall be negated by the host
before the data is transferred in an Ultra DMA burst. The
assertion of STOP by the host during an Ultra DMA burst
signals the termination of the Ultra DMA burst.
I/O Data Read Enable is the strobe signal asserted by the
host to read device registers or the data port.
Drive chip select 0 is used by host to select Command
Block registers.
IDE_IOWR\
Input
IDE_IORD\
IDE_CS0\
IDE_CS1\
Input
Input
Input
Drive chip select 1 is used by host to select Command
Block registers.
IDE_PIOIS16\
IDE_PDIG
Output
16-bit I/O transfer.
Input/Output Passed diagnostics.
DMA request. This signal, used for DMA data transfers
between host and device, shall be asserted by the device
when it is ready to transfer data to or from the host. For
multi word DMA transfers, the direction of data transfer is
Controller by IDE_IORD\ and IDE_IOWR\. When a DMS
operation is enabled, CS0\ and CS1\ shall not be asserted
and transfers shall be 16 bits wide. This signal shall be
release when the device is not selected.
IDE_DMARQ
IDE_DMARQ\
Output
Output
FC_WAIT
Ready signal to IDE_IORDY
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS3SSD4GB8PBG,AS3SSD8GB8PBG,AS3SSD16GB5PBG
Rev. 1.3 07/09
11
AUSTIN [ AUSTIN SEMICONDUCTOR ]
