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AS3SSD16GB5PBG 参数 Datasheet PDF下载

AS3SSD16GB5PBG图片预览
型号: AS3SSD16GB5PBG
PDF下载: 下载PDF文件 查看货源
内容描述: 固态硬盘芯片( SSDoC ) [Solid State Disk On Chip (SSDoC)]
分类和应用: 外围集成电路
文件页数/大小: 17 页 / 757 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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MICONDUCTOR, INC.  
                                                                   
                                                                   
                                                                     
                                                                     
                                                                       
                                                                       
                                                                           
                                                                           
                                                                             
                                                                             
                                                                               
                                                                               
                                                                                 
                                                                                 
SOLID STATE DISK  
AS3SSD4GB8PBG  
AS3SSD8GB8PBG  
AS3SSD16GB5PBG  
PRELIMINARY  
Austin Semiconductor, Inc.  
IDE_PRESET  
FC_WP_EN  
FC_WP_EN1  
Input  
Input  
Reset  
Write protect signal  
#
Reset processor. RESET# low resets the processor to the  
initial state and halts all activity. RESET# must be low for  
at least one cycle. On a transition from low to high, a Reset  
exception occurs and the processor starts execution at the  
Reset entry determined by the INT4 state. The transition  
may occur asynchronously to the clock. We recommend  
connecting this pin to a voltage monitoring circuit with  
open-drain output (e.g. Torex XC61A) supplying a reset  
signal for supply voltages less than 2.6 or 2.7V, connected  
to a R/C combination of 100 kΩ and 100 nF giving an  
additional reset delay in the order of 10 ms.  
FC_RESET  
Input  
FC_LED\  
Output  
Output  
Output  
Operation LED signal  
FC_MODE  
FC_IDEEN  
Master/Slave select and connect to IDE_CSEL for Cable  
select option  
XTALR  
R/C Clock Oscillator Resistor Output. The resistor  
connected between this pin and XTALI determines the  
operating clock frequency. Use a 470Ω resistor to obtain a  
frequency of about 20 MHz  
XTALC  
XTALI  
Output  
Input  
R/C Clock Oscillator Capacitor Output. Connect a 22pF  
capacitor between this pin and XTALI.  
R/C Clock Oscillator Input. This input connects to the other  
side of the resisors and the capacitor connected to XTALR1,  
XTALR2 and XTALC. Connect a 22pF capacitor from this pin  
to ground.  
NC  
Not connected  
Vcc_C  
Supply  
Supply  
Supply  
Supply  
Input  
Power Supply Voltage, Core  
Vcc_R  
Vcc_F  
Vcc_P  
FADJ  
Power Supply Voltage, Regulator  
Power Supply Voltage, Flash Memory  
Power Supply Voltage, controller  
3.3V Flash Memory Power Supply Adjustment. Connect a  
270pF capacitor from this pin to FOUT.  
FOUT  
Output  
3.3V Flash Memory Power Supply. This output provides a  
regulated 3.3V supply if the power supply voltage is above  
3.3V. This supply voltage must also be connected to the  
VCC_F pins.  
CADJ  
COUT  
Input  
2.5V Core Power Supply Adjustment. Connect a 220kΩ  
resistor from this pin to GND, a 220kΩ resistor from this  
pin to COUT, and a 270pF capacitor from this pin to COUT.  
2.5V Core Power Supply. This output provides a regulated  
2.5V supply if the power supply voltage is above 3.3V. This  
supply voltage must be connected to the VCC_C pins.  
3.3V Flash Memory Power Supply  
Output  
VccNAND_IN  
VccPLN_IN  
GndPLN  
Supply  
Supply  
Supply  
Supply to the controller  
Supply ground  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS3SSD4GB8PBG,AS3SSD8GB8PBG,AS3SSD16GB5PBG  
Rev. 1.3 07/09  
12