COTS PEM
COTS
BOOT SECTOR
BOOT SECTOR FLASH
Austin Semiconductor, Inc.
AS29LV016
DEVICE BUS OPERATIONS
This section describes the requirements and use of the device bus operations, which are initiated through the internal
command register. The command register itself does not occupy any addressable memory location. The register is
com-posed of latches that store the commands, along with the address and data information needed to execute the
command. The contents of the register serve as inputs to the internal state machine. The state machine outputs
dictate the function of the device. Table 1 lists the device bus operations, the inputs and control levels they require, and
the resulting output. The following subsections describe each of these operations in further detail.
Table 1: AS29LV016 Device Bus Operations
DQ0-
DQ7
D
OUT
D
IN
High-Z
High-Z
High-Z
D
IN
DQ8-DQ15
BYTE#
BYTE#
=V
IL
=V
IH
D
OUT
DQ8-DQ14= High Z,
DQ15=A-1
D
IN
High-Z
High-Z
High-Z
X
High-Z
High-Z
High-Z
X
Operation
Read
Write
Standby
Output Disable
Reset
Sector Protect
2
CE#
L
L
Vcc ± 0.3V
L
X
L
OE#
L
H
X
H
X
H
WE#
H
L
X
H
X
L
RESET#
H
H
Vcc ± 0.3V
H
L
V
ID
Address
1
A
IN
A
IN
X
X
X
Sector Address,
A6=L, A1=H, A0=L
Sector Address,
A6=H, A1=H, A0=L
A
IN
Sector Unprotect
2
Temporary Sector Unprotect
L
X
H
X
L
X
V
ID
V
ID
D
IN
D
IN
X
D
IN
X
High-Z
Legend:
L= Logic Low = V
IL
, H=Logic High=V
IH
, V
ID
=12.0±0.5V, X=Don't Care, A
IN
=Address In, D
IN
= Data In, D
OUT
=Data Out
Notes:
1. Addresses are A19:A0 in word mode (BYTE# = V
IH
), A19:A-1 in byte mode (BYTE# = V
IL
)
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See Sector Protection /
Unprotection on page 11.
WORD / BYTE CONFIGURATION
The BYTE# pin controls whether the device data I/O pins DQ15–DQ0 operate in the byte or word
configuration. If the BYTE# pin is set at logic
1
, the device is in word configuration, DQ15–DQ0 are
active and controlled by CE# and OE#.
If the BYTE# pin is set at logic
0
, the device is in byte configuration, and only data I/O pins DQ0–
DQ7 are active and controlled by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and
the DQ15 pin is used as an input for the LSB (A-1) address function.
AS29LV016
Rev. 2.1 10/08
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
AUSTIN [ AUSTIN SEMICONDUCTOR ]
