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AS29LV016JBRG-55/XT 参数 Datasheet PDF下载

AS29LV016JBRG-55/XT图片预览
型号: AS29LV016JBRG-55/XT
PDF下载: 下载PDF文件 查看货源
内容描述: 16兆位( 2M ×8位/ 1M ×16位) CMOS 3.0伏只引导扇区闪存 [16 Megabit (2M x 8-Bit / 1M x 16-Bit) CMOS 3.0 Volt-Only Boot Sector Flash Memory]
分类和应用: 闪存内存集成电路
文件页数/大小: 40 页 / 408 K
品牌: AUSTIN [ AUSTIN SEMICONDUCTOR ]
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COTS PEM  
BOOT SECTOR FLASH  
Austin Semiconductor, Inc.  
AS29LV016J  
TABLE 9: COMMAND DEFINITIONS  
Bus Cycles2-5  
Third Fourth  
First  
Second  
Fifth  
Sixth  
Command Sequence1  
Addr  
RA  
Data  
RD  
Addr  
Data  
Addr  
Data  
Addr  
Data  
Addr  
Data  
Addr  
Data  
Read6  
Reset7  
1
1
XXX  
555  
F0  
Word  
Byte  
Word  
Byte  
Word  
Byte  
2AA  
555  
2AA  
555  
2AA  
555  
555  
AAA  
555  
4
4
4
AA  
AA  
AA  
55  
55  
55  
90  
90  
90  
X00  
01  
Manufacturer ID  
AAA  
555  
Device ID,  
Top Boot Block  
Device ID,  
X01  
X02  
X01  
X02  
(SA)  
X02  
(SA)  
X04  
22C4  
C4  
AAA  
555  
AAA  
555  
2249  
49  
Bottom Boot Block  
AAA  
AAA  
XX00  
XX01  
00  
Word  
Byte  
555  
2AA  
555  
555  
Sector Protect Verify9  
4
AA  
55  
90  
AAA  
AAA  
01  
Word  
Byte  
Word  
Byte  
Word  
Byte  
55  
1
4
3
98  
AA  
AA  
CFI Query10  
Program  
AA  
555  
AAA  
555  
AAA  
XXX  
XXX  
555  
AAA  
555  
AAA  
XXX  
XXX  
2AA  
555  
2AA  
555  
PA  
555  
AAA  
555  
55  
55  
A0  
20  
PA  
PD  
Unlock Bypass  
Unlock Bypass Program11  
Unlock Bypass Reset12  
AAA  
2
2
A0  
90  
PD  
F0  
XXX  
2AA  
555  
2AA  
555  
Word  
Byte  
Word  
Byte  
555  
AAA  
555  
555  
AAA  
555  
2AA  
555  
2AA  
555  
555  
6
6
AA  
AA  
55  
55  
80  
80  
AA  
AA  
55  
55  
10  
30  
Chip Erase  
AAA  
SA  
Sector Erase  
Erase Suspend13  
Erase Resume14  
AAA  
AAA  
1
1
B0  
30  
Legend:  
X = Don’t care  
RA = Address of the memory location to be read.  
RD = Data read from location RA during read operation.  
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE# pulse, whichever  
happens later.  
PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE# pulse, whichever happens first.  
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A19–A12 uniquely select any sector.  
Note:  
1. See Table 1 for description of bus operations.  
2. All values are in hexadecimal.  
3. Except for the read cycle and the fourth cycle of the autoselect command sequence, all bus cycles are write cycles.  
4. Data bits DQ15–DQ8 are don’t cares for unlock and command cycles.  
5. Address bits A19–A11 are don’t cares for unlock and command cycles, unless SA or PA required.  
6. No unlock or command cycles required when reading array data.  
7. The Reset command is required to return to reading array data when device is in the autoselect mode, or if DQ5 goes high (while  
the device is providing status data).  
8. The fourth cycle of the autoselect command sequence is a read cycle.  
9. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more  
information.  
10. Command is valid when device is ready to read array data or when device is in autoselect mode.  
11. The Unlock Bypass command is required prior to the Unlock Bypass Program command.  
12. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode. F0  
is also acceptable.  
13. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The  
Erase Suspend command is valid only during a sector erase operation.  
14. The Erase Resume command is valid only during the Erase Suspend mode.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS29LV016J  
Rev. 0.0 02/09  
21  
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