FLASH
AS29F010
Austin Semiconductor, Inc.
After the sector erase command sequence is written, the
system should read the status on DQ7 (Data\ Polling) or DQ6
(Toggle Bit I) to ensure the device has accepted the command
sequence, and then read DQ3. If DQ3 is “1”, the internally
controlled erase cycle has begun; all further commands are
ignored until the erase operation is complete. If DQ3 is “0”, the
device will accept additional sector erase commands. To
ensure the command has been accepted, the system software
should check the status of DQ3 prior to and following each
subsequent sector erase command. If DQ3 is high on the
second status check, the last command might not have been
accepted. Table 5 shows the outputs for DQ3.
DQ3: Sector Erase Timer
After writing a sector erase command sequence, the
system may read DQ3 to determine whether or not an erase
operation has begun. (The sector erase timer does not apply to
the chip erase command.) If additional sectors are selected for
erasure, the entire time-out also applies after each additional
sector erase command. When the time-out is complete, DQ3
switches from “0” to “1.” The system may ignore DQ3 if the
system can guarantee that the time between additional sector
erase commands will always be less than 50µs. See also the
“Sector Erase Command Sequence” section.
TABLE 5: WRITE OPERATION STATUS
1
2
OPERATION
DQ6
Toggle
Toggle
No toggle
Data
DQ3
N/A
1
DQ7
DQ5
Embedded Program Algorithm
DQ7\
0
0
Standard
Mode
Embedded Erase Algorithm
0
0
Erase
Suspend
Mode
Reading within Erase Suspended Sector
Reading within Non-Erase Suspended Sector
1
N/A
Data
Data
Data
NOTES:
1. DQ7 requires a valid address when reading status information. Refer to the appropriate subsection for further details.
2. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. See “DQ5:
Exceeding Timing Limits” for more information.
ABSOLUTE MAXIMUM RATINGS*
Ambient Temperature with Power Applied............-55°C to +125°C
Voltage with Respect to Ground
VCC1.................................................................-2.0Vto+7.0V
A92................................................................-2.0Vto+13.0V
All other pins1...............................................-2.0V to +7.0V
Output Short Circuit Current3..................................................200mA
VCC Supply Voltage..................................................+4.50V to +5.50V
Storage Temperature..................................................-65°C to +125°C
FIGURE 5: Maximum Negative
Overshoot Waveform
NOTES:
1. Minimum DC voltage on input or I/O pin is -0.5V. During voltage transitions, input
may overshoot V to -2.0V for periods of up to 20ns. See Figure 5. Maximum DC voltage
SS
on input and I/O pins is V + 0.5V. During voltage transitions, input and I/O pins may
CC
overshoot V + 2.0V for periods up to 20ns. See Figure 6.
CC
2. Minimum DC voltage on A9 pin is -0.5V. During voltage transitions, A9 pins may
overshoot V to -2.0V for periods of up to 20ns. See Figure 5. Maximum DC input
SS
voltage on A9 is +12.5V which may overshoot to 14.0V for periods up to 20ns.
3. No more than one output shorted at a time. Duration of the short circuit should not be
greater than one second.
*Stresses greater than those listed under "Absolute Maximum Ratings"
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operation section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
FIGURE 6: Maximum Positive
Overshoot Waveform
periods may affect reliability.
AS29F010
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
Rev. 0.3 10/02
12
AUSTIN [ AUSTIN SEMICONDUCTOR ]
