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MEGA128CAN 参数 Datasheet PDF下载

MEGA128CAN图片预览
型号: MEGA128CAN
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有ISP功能的Flash和CAN控制器128K字节 [Microcontroller WITH 128K BYTES OF ISP FLASH AND CAN CONTROLLER]
分类和应用: 微控制器
文件页数/大小: 413 页 / 5507 K
品牌: ATMEL [ ATMEL ]
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AT90CAN128  
Sending Frames with 9 Data  
Bit  
If 9-bit characters are used (UCSZn = 7), the ninth bit must be written to the TXB8n bit in  
UCSRnB before the low byte of the character is written to UDRn. The following code  
examples show a transmit function that handles 9-bit characters. For the assembly  
code, the data to be sent is assumed to be stored in registers R17:R16.  
Assembly Code Example(1)(2)  
USART0_Transmit:  
; Wait for empty transmit buffer  
lds  
r18, UCSR0A  
sbrs r18, UDRE0  
rjmp USART0_Transmit  
; Copy 9th bit from r17-bit0 to TXB80 via T-bit of SREG  
lds  
bst  
bld  
sts  
r18, UCSR0B  
r17, 0  
r18, TXB80  
UCSR0B, r18  
; Put LSB data (r16) into buffer, sends the data  
sts  
ret  
UDR0, r16  
C Code Example(1)(2)  
void USART0_Transmit (unsigned int data )  
{
/* Wait for empty transmit buffer */  
while ( !( UCSR0A & (1<<UDRE0)))  
;
/* Copy 9th bit to TXB8 */  
UCSR0B &= ~(1<<TXB80);  
if ( data & 0x0100 )  
UCSR0B |= (1<<TXB80);  
/* Put data into buffer, sends the data */  
UDR0 = data;  
}
Notes: 1. These transmit functions are written to be general functions. They can be optimized if  
the contents of the UCSR0B is static. For example, only the TXB80 bit of the  
UCSRB0 Register is used after initialization.  
2. The example code assumes that the part specific header file is included.  
sparc.  
The ninth bit can be used for indicating an address frame when using multi processor  
communication mode or for other protocol handling as for example synchronization.  
Transmitter Flags and  
Interrupts  
The USARTn Transmitter has two flags that indicate its state: USART Data Register  
Empty (UDREn) and Transmit Complete (TXCn). Both flags can be used for generating  
interrupts.  
The Data Register Empty (UDREn) flag indicates whether the transmit buffer is ready to  
receive new data. This bit is set when the transmit buffer is empty, and cleared when the  
transmit buffer contains data to be transmitted that has not yet been moved into the Shift  
Register. For compatibility with future devices, always write this bit to zero when writing  
the UCSRnA Register.  
179  
4250E–CAN–12/04  
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