2. Block Diagram
Figure 2-1.
SAM4S16/S8 Series 100-pin version Block Diagram
TD
TDI
TMO
TC S/S
K/ WD
SW IO
CL
K
JT
AG
SE
L
VD
D
VD
DO
IN
UT
Voltage
Regulator
Flash
Unique
Identifier
User
Signature
N
V
I
C
TST
PCK0-PCK2
System Controller
PLLA
PLLB
RC Osc
12/8/4 MHz
PMC
JTAG & Serial Wire
In-Circuit Emulator
XIN
XOUT
3-20 MHz
Osc
SUPC
24-Bit
Cortex M-4 Processor
SysTick Counter
Fmax 120 MHz
DSP
MPU
FLASH
1024 Kbytes
512 Kbytes
SRAM
ROM
128 Kbytes 16 Kbytes
XIN32
XOUT32
ERASE
VDDIO
VDDCORE
VDDPLL
RTCOUT0
RTCOUT1
NRST
WDT
Osc 32 kHz
RC 32 kHz
I/D
S
4-layer AHB Bus Matrix Fmax 120 MHz
8 GPBREG
RTT
POR
RTC
SM
Peripheral
Bridge
2668 USB 2.0
Bytes
Full
FIFO Speed
Transceiver
RSTC
DDP
DDM
PIOA / PIOB / PIOC
TWCK0
TWD0
TWCK1
TWD1
URXD0
UTXD0
URXD1
UTXD1
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DSR1
DTR1
RI1
DCD1
TWI0
TWI1
UART0
UART1
PDC
PDC
PDC
PDC
External Bus
Interface
NAND Flash
Logic
PIO
USART0
PDC
Static Memory
Controller
D[7:0]
A[0:23]
A21/NANDALE
A22/NANDCLE
NCS0
NCS1
NCS2
NCS3
NRD
NWE
NANDOE
NANDWE
NWAIT
PIODC[7:0]
PIODCEN1
PIODCEN2
PIODCCLK
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TF
TK
TD
RD
RK
RF
MCCK
MCCDA
MCDA[0..3]
ADVREF
PDC
USART1
PIO
PDC
PDC
SPI
TCLK[0:2]
TIOA[0:2]
TIOB[0:2]
TCLK[3:5]
TIOA[3:5]
TIOB[3:5]
PWMH[0:3]
PWML[0:3]
PWMFI0
ADTRG
AD[0..14]
ADVREF
DAC0
DAC1
DATRG
Timer Counter A
TC[0..2]
PDC
SSC
Timer Counter B
PDC
TC[3..5]
High Speed MCI
PWM
PDC
Temp. Sensor
12-bit ADC
12-bit DAC
PDC
PDC
Analog
Comparator
CRC Unit
ADC Ch.
4
SAM4S Series [Preliminary]
11100BS–ATARM–31-Jul-12