ATmega48A/48PA/88A/88PA/168A/168PA/328/328P
2. Overview
The ATmega48A/48PA/88A/88PA/168A/168PA/328/328P is a low-power CMOS 8-bit microcon-
troller based on the AVR enhanced RISC architecture. By executing powerful instructions in a
single clock cycle, the ATmega48A/48PA/88A/88PA/168A/168PA/328/328P achieves through-
puts approaching 1 MIPS per MHz allowing the system designer to optimize power consumption
versus processing speed.
2.1
Block Diagram
Figure 2-1.
Block Diagram
GND
VCC
Watchdog
Timer
Watchdog
Oscillator
Power
Supervision
POR / BOD &
RESET
debugWIRE
PROGRAM
LOGIC
Oscillator
Circuits /
Clock
Generation
Flash
SRAM
CPU
EEPROM
AVCC
AREF
GND
8bit T/C 0
16bit T/C 1
A/D Conv.
2
DATABUS
8bit T/C 2
Analog
Comp.
Internal
Bandgap
6
USART 0
SPI
TWI
PORT D (8)
PORT B (8)
PORT C (7)
RESET
XTAL[1..2]
PD[0..7]
PB[0..7]
PC[0..6]
ADC[6..7]
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
5
8271BS–AVR–04/10
ATMEL [ ATMEL CORPORATION ]
