ATmega64A
• After all TWI Register updates and other pending application software tasks have been
completed, TWCR is written. When writing TWCR, the TWINT bit should be set. Writing a
one to TWINT clears the flag. The TWI will then commence executing whatever operation
was specified by the TWCR setting.
In the following an assembly and C implementation of the example is given. Note that the code
below assumes that several definitions have been made for example by using include-files.
Assembly code example(1)
C example(1)
Comments
ldi
r16, (1<<TWINT)|(1<<TWSTA)|
TWCR = (1<<TWINT)|(1<<TWSTA)|
1
2
Send START condition
(1<<TWEN)
TWCR, r16
(1<<TWEN)
out
wait1:
while (!(TWCR & (1<<TWINT)))
Wait for TWINT flag set. This
indicates that the START
in
r16,TWCR
;
condition has been transmitted
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi r16, START
brne ERROR
r16,TWSR
if ((TWSR & 0xF8) != START)
3
4
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR
ERROR();
ldi
out
ldi
out
r16, SLA_W
TWDR = SLA_W;
Load SLA_W into TWDR
Register. Clear TWINT bit in
TWCR to start transmission of
address
TWDR, r16
TWCR = (1<<TWINT) | (1<<TWEN);
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
wait2:
while (!(TWCR & (1<<TWINT)))
Wait for TWINT flag set. This
indicates that the SLA+W has
been transmitted, and
in
r16,TWCR
;
sbrs r16,TWINT
rjmp wait2
ACK/NACK has been received.
in
r16,TWSR
if ((TWSR & 0xF8) != MT_SLA_ACK)
5
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
andi r16, 0xF8
ERROR();
cpi
r16, MT_SLA_ACK
MT_SLA_ACK go to ERROR
brne ERROR
ldi
out
ldi
out
r16, DATA
TWDR = DATA;
Load DATA into TWDR Register.
Clear TWINT bit in TWCR to
start transmission of data
TWDR, r16
TWCR = (1<<TWINT) | (1<<TWEN);
r16, (1<<TWINT) | (1<<TWEN)
TWCR, r16
wait3:
while (!(TWCR & (1<<TWINT)))
6
7
Wait for TWINT flag set. This
indicates that the DATA has been
transmitted, and ACK/NACK has
been received.
in
r16,TWCR
;
sbrs r16,TWINT
rjmp wait3
in
r16,TWSR
if ((TWSR & 0xF8) != MT_DATA_ACK)
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
andi r16, 0xF8
ERROR();
cpi
r16, MT_DATA_ACK
MT_DATA_ACK go to ERROR
brne ERROR
ldi
r16, (1<<TWINT)|(1<<TWEN)|
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWSTO);
Transmit STOP condition
(1<<TWSTO)
TWCR, r16
out
Note:
1. For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions must be replaced
with instructions that allow access to extended I/O. Typically “LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and
“CBR”.
211
8160C–AVR–07/09
ATMEL [ ATMEL ]
