欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA48PA-AU的Datasheet PDF文件第38页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第39页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第40页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第41页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第43页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第44页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第45页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第46页  
ATmega48PA/88PA/168PA/328P  
9.9  
Power Reduction Register  
The Power Reduction Register (PRR), see ”PRR – Power Reduction Register” on page 45, pro-  
vides a method to stop the clock to individual peripherals to reduce power consumption. The  
current state of the peripheral is frozen and the I/O registers can not be read or written.  
Resources used by the peripheral when stopping the clock will remain occupied, hence the  
peripheral should in most cases be disabled before stopping the clock. Waking up a module,  
which is done by clearing the bit in PRR, puts the module in the same state as before shutdown.  
Module shutdown can be used in Idle mode and Active mode to significantly reduce the overall  
power consumption. In all other sleep modes, the clock is already stopped.  
9.10 Minimizing Power Consumption  
There are several possibilities to consider when trying to minimize the power consumption in an  
AVR controlled system. In general, sleep modes should be used as much as possible, and the  
sleep mode should be selected so that as few as possible of the device’s functions are operat-  
ing. All functions not needed should be disabled. In particular, the following modules may need  
special consideration when trying to achieve the lowest possible power consumption.  
9.10.1  
9.10.2  
Analog to Digital Converter  
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-  
abled before entering any sleep mode. When the ADC is turned off and on again, the next  
conversion will be an extended conversion. Refer to ”Analog-to-Digital Converter” on page 250  
for details on ADC operation.  
Analog Comparator  
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering  
ADC Noise Reduction mode, the Analog Comparator should be disabled. In other sleep modes,  
the Analog Comparator is automatically disabled. However, if the Analog Comparator is set up  
to use the Internal Voltage Reference as input, the Analog Comparator should be disabled in all  
sleep modes. Otherwise, the Internal Voltage Reference will be enabled, independent of sleep  
mode. Refer to ”Analog Comparator” on page 246 for details on how to configure the Analog  
Comparator.  
9.10.3  
9.10.4  
Brown-out Detector  
If the Brown-out Detector is not needed by the application, this module should be turned off. If  
the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in all sleep  
modes, and hence, always consume power. In the deeper sleep modes, this will contribute sig-  
nificantly to the total current consumption. Refer to ”Brown-out Detection” on page 48 for details  
on how to configure the Brown-out Detector.  
Internal Voltage Reference  
The Internal Voltage Reference will be enabled when needed by the Brown-out Detection, the  
Analog Comparator or the ADC. If these modules are disabled as described in the sections  
above, the internal voltage reference will be disabled and it will not be consuming power. When  
turned on again, the user must allow the reference to start up before the output is used. If the  
reference is kept on in sleep mode, the output can be used immediately. Refer to ”Internal Volt-  
age Reference” on page 49 for details on the start-up time.  
42  
8161D–AVR–10/09  
 复制成功!