ATmega48PA/88PA/168PA/328P
Figure 23-10. Offset Error
Output Code
Ideal ADC
Actual ADC
Offset
Error
VREF
Input Voltage
• Gain error: After adjusting for offset, the gain error is found as the deviation of the last transition
(0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below maximum). Ideal value: 0
LSB
Figure 23-11. Gain Error
Gain
Error
Output Code
Ideal ADC
Actual ADC
VREF
Input Voltage
• Integral Non-linearity (INL): After adjusting for offset and gain error, the INL is the maximum
deviation of an actual transition compared to an ideal transition for any code. Ideal value: 0
LSB.
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8161D–AVR–10/09