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ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
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ATmega48PA/88PA/168PA/328P  
.
Table 22-1. Analog Comparator Multiplexed Input  
ACME  
ADEN  
MUX2..0  
xxx  
Analog Comparator Negative Input  
0
1
1
1
1
1
1
1
1
1
x
1
0
0
0
0
0
0
0
0
AIN1  
xxx  
AIN1  
000  
ADC0  
ADC1  
ADC2  
ADC3  
ADC4  
ADC5  
ADC6  
ADC7  
001  
010  
011  
100  
101  
110  
111  
22.3 Register Description  
22.3.1  
ADCSRB – ADC Control and Status Register B  
Bit  
7
6
ACME  
R/W  
0
5
4
3
2
ADTS2  
R/W  
0
1
ADTS1  
R/W  
0
0
ADTS0  
R/W  
0
(0x7B)  
ADCSRB  
Read/Write  
Initial Value  
R
0
R
0
R
0
R
0
• Bit 6 – ACME: Analog Comparator Multiplexer Enable  
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the  
ADC multiplexer selects the negative input to the Analog Comparator. When this bit is written  
logic zero, AIN1 is applied to the negative input of the Analog Comparator. For a detailed  
description of this bit, see ”Analog Comparator Multiplexed Input” on page 246.  
22.3.2  
ACSR – Analog Comparator Control and Status Register  
Bit  
0x30 (0x50)  
7
6
5
4
3
ACIE  
R/W  
0
2
ACIC  
R/W  
0
1
ACIS1  
R/W  
0
0
ACIS0  
R/W  
0
ACD  
ACBG  
ACO  
ACI  
R/W  
0
ACSR  
Read/Write  
Initial Value  
R/W  
0
R/W  
0
R
N/A  
• Bit 7 – ACD: Analog Comparator Disable  
When this bit is written logic one, the power to the Analog Comparator is switched off. This bit  
can be set at any time to turn off the Analog Comparator. This will reduce power consumption in  
Active and Idle mode. When changing the ACD bit, the Analog Comparator Interrupt must be  
disabled by clearing the ACIE bit in ACSR. Otherwise an interrupt can occur when the bit is  
changed.  
• Bit 6 – ACBG: Analog Comparator Bandgap Select  
When this bit is set, a fixed bandgap reference voltage replaces the positive input to the Analog  
Comparator. When this bit is cleared, AIN0 is applied to the positive input of the Analog Compar-  
ator. When the bandgap referance is used as input to the Analog Comparator, it will take a  
247  
8161D–AVR–10/09  
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