欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA48PA-AU的Datasheet PDF文件第190页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第191页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第192页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第193页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第195页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第196页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第197页浏览型号ATMEGA48PA-AU的Datasheet PDF文件第198页  
ATmega48PA/88PA/168PA/328P  
nine data bits, then the ninth bit (RXB8n) is used for identifying address and data frames. When  
the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the  
frame type bit is zero the frame is a data frame.  
The Multi-processor Communication mode enables several slave MCUs to receive data from a  
master MCU. This is done by first decoding an address frame to find out which MCU has been  
addressed. If a particular slave MCU has been addressed, it will receive the following data  
frames as normal, while the other slave MCUs will ignore the received frames until another  
address frame is received.  
19.9.1  
Using MPCMn  
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZn = 7). The  
ninth bit (TXB8n) must be set when an address frame (TXB8n = 1) or cleared when a data frame  
(TXB = 0) is being transmitted. The slave MCUs must in this case be set to use a 9-bit character  
frame format.  
The following procedure should be used to exchange data in Multi-processor Communication  
mode:  
1. All Slave MCUs are in Multi-processor Communication mode (MPCMn in  
UCSRnA is set).  
2. The Master MCU sends an address frame, and all slaves receive and read this frame. In  
the Slave MCUs, the RXCn Flag in UCSRnA will be set as normal.  
3. Each Slave MCU reads the UDRn Register and determines if it has been selected. If so,  
it clears the MPCMn bit in UCSRnA, otherwise it waits for the next address byte and  
keeps the MPCMn setting.  
4. The addressed MCU will receive all data frames until a new address frame is received.  
The other Slave MCUs, which still have the MPCMn bit set, will ignore the data frames.  
5. When the last data frame is received by the addressed MCU, the addressed MCU sets  
the MPCMn bit and waits for a new address frame from master. The process then  
repeats from 2.  
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the  
Receiver must change between using n and n+1 character frame formats. This makes full-  
duplex operation difficult since the Transmitter and Receiver uses the same character size set-  
ting. If 5- to 8-bit character frames are used, the Transmitter must be set to use two stop bit  
(USBSn = 1) since the first stop bit is used for indicating the frame type.  
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCMn bit. The  
MPCMn bit shares the same I/O location as the TXCn Flag and this might accidentally be  
cleared when using SBI or CBI instructions.  
194  
8161D–AVR–10/09  
 复制成功!