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ATMEGA48PA-AU 参数 Datasheet PDF下载

ATMEGA48PA-AU图片预览
型号: ATMEGA48PA-AU
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与4/8/ 16 / 32K字节的系统内可编程闪存 [8-bit Microcontroller with 4/8/16/32K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 448 页 / 12817 K
品牌: ATMEL [ ATMEL ]
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ATmega48PA/88PA/168PA/328P  
Assembly Code Example(1)  
USART_Receive:  
; Wait for data to be received  
sbis UCSRnA, RXCn  
rjmp USART_Receive  
; Get and return received data from buffer  
in  
r16, UDRn  
ret  
C Code Example(1)  
unsigned char USART_Receive( void )  
{
/* Wait for data to be received */  
while ( !(UCSRnA & (1<<RXCn)) )  
;
/* Get and return received data from buffer */  
return UDRn;  
}
Note:  
1. See ”About Code Examples” on page 7.  
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI”  
instructions must be replaced with instructions that allow access to extended I/O. Typically  
“LDS” and “STS” combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.  
The function simply waits for data to be present in the receive buffer by checking the RXCn Flag,  
before reading the buffer and returning the value.  
19.7.2  
Receiving Frames with 9 Data Bits  
If 9-bit characters are used (UCSZn=7) the ninth bit must be read from the RXB8n bit in  
UCSRnB before reading the low bits from the UDRn. This rule applies to the FEn, DORn and  
UPEn Status Flags as well. Read status from UCSRnA, then data from UDRn. Reading the  
UDRn I/O location will change the state of the receive buffer FIFO and consequently the TXB8n,  
FEn, DORn and UPEn bits, which all are stored in the FIFO, will change.  
The following code example shows a simple USART receive function that handles both nine bit  
characters and the status bits.  
187  
8161D–AVR–10/09  
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