ATmega48PA/88PA/168PA/328P
6.4.1
The X-register, Y-register, and Z-register
The registers R26..R31 have some added functions to their general purpose usage. These reg-
isters are 16-bit address pointers for indirect addressing of the data space. The three indirect
address registers X, Y, and Z are defined as described in Figure 6-3.
Figure 6-3. The X-, Y-, and Z-registers
15
XH
XL
0
0
X-register
7
0
0
7
R27 (0x1B)
R26 (0x1A)
15
YH
YL
ZL
0
0
Y-register
Z-register
7
7
R29 (0x1D)
R28 (0x1C)
15
ZH
0
0
7
7
0
R31 (0x1F)
R30 (0x1E)
In the different addressing modes these address registers have functions as fixed displacement,
automatic increment, and automatic decrement (see the instruction set reference for details).
6.5
Stack Pointer
The Stack is mainly used for storing temporary data, for storing local variables and for storing
return addresses after interrupts and subroutine calls. Note that the Stack is implemented as
growing from higher to lower memory locations. The Stack Pointer Register always points to the
top of the Stack. The Stack Pointer points to the data SRAM Stack area where the Subroutine
and Interrupt Stacks are located. A Stack PUSH command will decrease the Stack Pointer.
The Stack in the data SRAM must be defined by the program before any subroutine calls are
executed or interrupts are enabled. Initial Stack Pointer value equals the last address of the
internal SRAM and the Stack Pointer must be set to point above start of the SRAM, see Table 7-
3 on page 18.
See Table 6-1 for Stack Pointer details.
Table 6-1.
Stack Pointer instructions
Description
Decremented by 1 Data is pushed onto the stack
Return address is pushed onto the stack with a subroutine call or
Instruction Stack pointer
PUSH
CALL
ICALL
RCALL
Decremented by 2 interrupt
POP
Incremented by 1
Incremented by 2
Data is popped from the stack
RET
RETI
Return address is popped from the stack with return from
subroutine or return from interrupt
The AVR Stack Pointer is implemented as two 8-bit registers in the I/O space. The number of
bits actually used is implementation dependent. Note that the data space in some implementa-
tions of the AVR architecture is so small that only SPL is needed. In this case, the SPH Register
will not be present.
12
8161D–AVR–10/09
ATMEL [ ATMEL ]
