ATmega16U4/ATmega32U4
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Page
0x1B (0x3B)
0x1A (0x3A)
0x19 (0x39)
0x18 (0x38)
0x17 (0x37)
0x16 (0x36)
0x15 (0x35)
0x14 (0x34)
0x13 (0x33)
0x12 (0x32)
0x11 (0x31)
0x10 (0x30)
0x0F (0x2F)
0x0E (0x2E)
0x0D (0x2D)
0x0C (0x2C)
0x0B (0x2B)
0x0A (0x2A)
0x09 (0x29)
0x08 (0x28)
0x07 (0x27)
0x06 (0x26)
0x05 (0x25)
0x04 (0x24)
0x03 (0x23)
0x02 (0x22)
0x01 (0x21)
0x00 (0x20)
PCIFR
Reserved
TIFR4
-
-
-
-
-
-
-
PCIF0
-
-
-
-
-
-
-
-
OCF4D
OCF4A
OCF4B
-
-
TOV4
-
-
TIFR3
-
-
ICF3
-
OCF3C
OCF3B
OCF3A
TOV3
Reserved
TIFR1
-
-
-
-
-
-
-
-
-
-
ICF1
-
OCF1C
OCF1B
OCF1A
TOV1
TIFR0
-
-
-
-
-
OCF0B
OCF0A
TOV0
Reserved
Reserved
Reserved
PORTF
DDRF
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PORTF7
DDF7
PINF7
-
-
-
-
-
-
-
-
PORTF6
DDF6
PINF6
PORTE6
DDE6
PINE6
PORTD6
DDD6
PIND6
PORTC6
DDC6
PINC6
PORTB6
DDB6
PINB6
-
PORTF5
PORTF4
-
-
PORTF1
PORTF0
DDF5
DDF4
-
-
DDF1
DDF0
PINF
PINF5
PINF4
-
-
PINF1
PINF0
PORTE
DDRE
-
-
-
PORTE2
-
-
-
-
-
-
DDE2
-
-
PINE
-
-
-
-
PINE2
-
-
PORTD
DDRD
PORTD7
DDD7
PIND7
PORTC7
DDC7
PINC7
PORTB7
DDB7
PINB7
-
PORTD5
PORTD4
PORTD3
PORTD2
PORTD1
PORTD0
DDD5
DDD4
DDD3
DDD2
DDD1
DDD0
PIND
PIND5
PIND4
PIND3
PIND2
PIND1
PIND0
PORTC
DDRC
-
-
-
-
-
-
-
-
-
-
-
-
PINC
-
-
-
-
-
-
PORTB
DDRB
PORTB5
PORTB4
PORTB3
PORTB2
PORTB1
PORTB0
DDB5
DDB4
DDB3
DDB2
DDB1
DDB0
PINB
PINB5
PINB4
PINB3
PINB2
PINB1
PINB0
Reserved
Reserved
Reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Note:
1. For compatibility with future devices, reserved bits should be written to zero if accessed. Reserved I/O memory addresses
should never be written.
2. I/O registers within the address range $00 - $1F are directly bit-accessible using the SBI and CBI instructions. In these reg-
isters, the value of single bits can be checked by using the SBIS and SBIC instructions.
3. Some of the status flags are cleared by writing a logical one to them. Note that the CBI and SBI instructions will operate on
all bits in the I/O register, writing a one back into any flag read as set, thus clearing the flag. The CBI and SBI instructions
work with registers 0x00 to 0x1F only.
4. When using the I/O specific commands IN and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O regis-
ters as data space using LD and ST instructions, $20 must be added to these addresses. The ATmega16U4/ATmega32U4 is
a complex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for
the IN and OUT instructions. For the Extended I/O space from $60 - $1FF in SRAM, only the ST/STS/STD and LD/LDS/LDD
instructions can be used.
12
7766DS–AVR–01/09