ATmega48/88/168
35.12 Rev. 2545B-01/04
1.
2.
3.
Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption
Estimates in 35.“Features” on page 1.
Updated “Stack Pointer” on page 14 with RAMEND as recommended Stack Pointer
value.
Added section “Power Reduction Register” on page 42 and a note regarding the use
of the PRR bits to 2-wire, Timer/Counters, USART, Analog Comparator and ADC
sections.
4.
5.
6.
Updated “Watchdog Timer” on page 50.
Updated Figure 15-2 on page 131 and Table 15-3 on page 132.
Extra Compare Match Interrupt OCF2B added to features in section “8-bit
Timer/Counter2 with PWM and Asynchronous Operation” on page 141
Updated Table 9-1 on page 40, Table 23-5 on page 260, Table 27-4 to Table 27-7 on
page 287 to 289 and Table 23-1 on page 250. Added note 2 to Table 27-1 on page
286. Fixed typo in Table 12-1 on page 68.
7.
8.
9.
Updated whole “Typical Characteristics” on page 316.
Added item 2 to 5 in “Errata ATmega48” on page 357.
Renamed the following bits:
10.
- SPMEN to SELFPRGEN
- PSR2 to PSRASY
- PSR10 to PSRSYNC
- Watchdog Reset to Watchdog System Reset
11.
12.
Updated C code examples containing old IAR syntax.
Updated BLBSET description in “SPMCSR – Store Program Memory Control and
Status Register” on page 284.
367
2545M–AVR–09/07