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ATMEGA48V-10AUR 参数 Datasheet PDF下载

ATMEGA48V-10AUR图片预览
型号: ATMEGA48V-10AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 10MHz, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ABA, TQFP-32]
分类和应用: 闪存微控制器
文件页数/大小: 376 页 / 4764 K
品牌: ATMEL [ ATMEL ]
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System Programming of the device. There are theoretical possibilities of this happening also  
in run-mode. The following three cases can trigger the device to get stuck in a reset-state:  
- Two succeeding resets are applied where the second reset occurs in the 10ns window  
before the device is out of the reset-state caused by the first reset.  
- A reset is applied in a 10 ns window while the system clock prescaler value is updated by  
software.  
- Leaving SPI-programming mode generates an internal reset signal that can trigger this  
case.  
The two first cases can occur during normal operating mode, while the last case occurs only  
during programming of the device.  
Problem Fix/Workaround  
The first case can be avoided during run-mode by ensuring that only one reset source is  
active. If an external reset push button is used, the reset start-up time should be selected  
such that the reset line is fully debounced during the start-up time.  
The second case can be avoided by not using the system clock prescaler.  
The third case occurs during In-System programming only. It is most frequently seen when  
using the internal RC at maximum frequency.  
If the device gets stuck in the reset-state, turn power off, then on again to get the device out  
of this state.  
2. Interrupts may be lost when writing the timer registers in the asynchronous timer  
If one of the timer registers which is synchronized to the asynchronous timer2 clock is writ-  
ten in the cycle before an overflow interrupt occurs, the interrupt may be lost.  
Problem Fix/Workaround  
Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF  
before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.  
The only safe time to write to any of the Timer2 registers in asynchronous mode is in a com-  
pare interrupt routine where the compare register is not 0xFF, or if the compare register is  
0xFF, after a delay of at least one asynchronous clock cycle from the start of the interrupt.  
34.3.3  
Rev A  
Wrong values read after Erase Only operation  
Part may hang in reset  
Interrupts may be lost when writing the timer registers in the asynchronous timer  
1. Wrong values read after Erase Only operation  
At supply voltages below 2.7 V, an EEPROM location that is erased by the Erase Only oper-  
ation may read as programmed (0x00).  
Problem Fix/Workaround  
If it is necessary to read an EEPROM location after Erase Only, use an Atomic Write opera-  
tion with 0xFF as data in order to erase a location. In any case, the Write Only operation can  
be used as intended. Thus no special considerations are needed as long as the erased loca-  
tion is not read before it is programmed.  
2. Part may hang in reset  
362  
ATmega48/88/168  
2545M–AVR–09/07  
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