ATmega48/88/168
Table 17-8. Waveform Generation Mode Bit Description
Timer/Counter
Mode of
Operation
Update of
OCRx at
TOV Flag
Mode
WGM2
WGM1
WGM0
TOP
Set on(1)(2)
0
0
0
0
Normal
0xFF
Immediate
TOP
MAX
PWM, Phase
Correct
1
0
0
1
0xFF
BOTTOM
2
3
4
0
0
1
1
1
0
0
1
0
CTC
OCRA
0xFF
–
Immediate
BOTTOM
–
MAX
MAX
–
Fast PWM
Reserved
PWM, Phase
Correct
5
1
0
1
OCRA
TOP
BOTTOM
6
7
1
1
1
1
0
1
Reserved
Fast PWM
–
–
–
OCRA
BOTTOM
TOP
Notes: 1. MAX= 0xFF
2. BOTTOM= 0x00
17.11.2 TCCR2B – Timer/Counter Control Register B
Bit
7
FOC2A
W
6
FOC2B
W
5
–
4
–
3
2
CS22
R
1
CS21
R/W
0
0
CS20
R/W
0
WGM22
TCCR2B
(0xB1)
Read/Write
Initial Value
R
0
R
0
R
0
0
0
0
• Bit 7 – FOC2A: Force Output Compare A
The FOC2A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2A output is
changed according to its COM2A1:0 bits setting. Note that the FOC2A bit is implemented as a
strobe. Therefore it is the value present in the COM2A1:0 bits that determines the effect of the
forced compare.
A FOC2A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR2A as TOP.
The FOC2A bit is always read as zero.
• Bit 6 – FOC2B: Force Output Compare B
The FOC2B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR2B is written when operating in PWM mode. When writing a logical one to the FOC2B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC2B output is
changed according to its COM2B1:0 bits setting. Note that the FOC2B bit is implemented as a
strobe. Therefore it is the value present in the COM2B1:0 bits that determines the effect of the
forced compare.
157
2545M–AVR–09/07
ATMEL [ ATMEL ]
