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ATMEGA8A-AUR 参数 Datasheet PDF下载

ATMEGA8A-AUR图片预览
型号: ATMEGA8A-AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 16MHz, CMOS, PQFP32, 7 X 7 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ABA, TQFP-32]
分类和应用: 闪存
文件页数/大小: 308 页 / 4674 K
品牌: ATMEL [ ATMEL ]
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ATmega8(L)  
The following code example shows how to set port B pins 0 and 1 high, 2 and 3 low, and define  
the port pins from 4 to 7 as input with pull-ups assigned to port pins 6 and 7. The resulting pin  
values are read back again, but as previously discussed, a nop instruction is included to be able  
to read back the value recently assigned to some of the pins.  
Assembly Code Example(1)  
...  
; Define pull-ups and set outputs high  
; Define directions for port pins  
ldi r16,(1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0)  
ldi r17,(1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0)  
out PORTB,r16  
out DDRB,r17  
; Insert nop for synchronization  
nop  
; Read port pins  
in  
r16,PINB  
...  
C Code Example(1)  
unsigned char i;  
...  
/* Define pull-ups and set outputs high */  
/* Define directions for port pins */  
PORTB = (1<<PB7)|(1<<PB6)|(1<<PB1)|(1<<PB0);  
DDRB = (1<<DDB3)|(1<<DDB2)|(1<<DDB1)|(1<<DDB0);  
/* Insert nop for synchronization*/  
_NOP();  
/* Read port pins */  
i = PINB;  
...  
Note:  
1. For the assembly program, two temporary registers are used to minimize the time from pull-  
ups are set on pins 0, 1, 6, and 7, until the direction bits are correctly set, defining bit 2 and 3  
as low and redefining bits 0 and 1 as strong high drivers.  
Digital Input Enable  
and Sleep Modes  
As shown in Figure 22, the digital input signal can be clamped to ground at the input of the  
Schmitt-trigger. The signal denoted SLEEP in the figure, is set by the MCU Sleep Controller in  
Power-down mode, Power-save mode, and Standby mode to avoid high power consumption if  
some input signals are left floating, or have an analog signal level close to VCC/2.  
SLEEP is overridden for port pins enabled as External Interrupt pins. If the External Interrupt  
Request is not enabled, SLEEP is active also for these pins. SLEEP is also overridden by vari-  
ous other alternate functions as described in “Alternate Port Functions” on page 56.  
If a logic high level (“one”) is present on an Asynchronous External Interrupt pin configured as  
“Interrupt on Rising Edge, Falling Edge, or Any Logic Change on Pin” while the external interrupt  
is not enabled, the corresponding External Interrupt Flag will be set when resuming from the  
above mentioned sleep modes, as the clamping in these sleep modes produces the requested  
logic change.  
55  
2486T–AVR–05/08  
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