USART Control and
Status Register C –
UCSRC
Bit
7
URSEL
R/W
1
6
UMSEL
R/W
0
5
UPM1
R/W
0
4
UPM0
R/W
0
3
USBS
R/W
0
2
UCSZ1
R/W
1
1
UCSZ0
R/W
1
0
UCPOL
R/W
0
UCSRC
Read/Write
Initial Value
The UCSRC Register shares the same I/O location as the UBRRH Register. See the “Accessing
UBRRH/UCSRC Registers” on page 152 section which describes how to access this register.
• Bit 7 – URSEL: Register Select
This bit selects between accessing the UCSRC or the UBRRH Register. It is read as one when
reading UCSRC. The URSEL must be one when writing the UCSRC.
• Bit 6 – UMSEL: USART Mode Select
This bit selects between Asynchronous and Synchronous mode of operation.
Table 55. UMSEL Bit Settings
UMSEL
Mode
0
1
Asynchronous Operation
Synchronous Operation
156
ATmega8(L)
2486T–AVR–05/08
ATMEL [ ATMEL ]
