13.4 Register Description
13.4.1
MCUCR – MCU Control Register
Bit
7
–
6
–
5
–
4
3
–
2
–
1
IVSEL
R/W
0
0
IVCE
R/W
0
0x35 (0x55)
Read/Write
Initial Value
PUD
R/W
0
MCUCR
R
0
R
0
R
0
R
0
R
0
• Bit 4 – PUD: Pull-up Disable
When this bit is written to one, the pull-ups in the I/O ports are disabled even if the DDxn and
PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn} = 0b01). See “Con-
figuring the Pin” on page 73 for more details about this feature.
13.4.2
13.4.3
13.4.4
13.4.5
13.4.6
13.4.7
PORTB – The Port B Data Register
Bit
7
6
PORTB6
R/W
0
5
PORTB5
R/W
0
4
PORTB4
R/W
0
3
PORTB3
R/W
0
2
PORTB2
R/W
0
1
PORTB1
R/W
0
0
PORTB0
R/W
0
PORTB7
R/W
0
PORTB
DDRB
PINB
0x05 (0x25)
Read/Write
Initial Value
DDRB – The Port B Data Direction Register
Bit
7
DDB7
R/W
0
6
DDB6
R/W
0
5
DDB5
R/W
0
4
DDB4
R/W
0
3
DDB3
R/W
0
2
DDB2
R/W
0
1
DDB1
R/W
0
0
DDB0
R/W
0
0x04 (0x24)
Read/Write
Initial Value
PINB – The Port B Input Pins Address
Bit
7
PINB7
R
6
PINB6
R
5
PINB5
R
4
PINB4
R
3
PINB3
R
2
PINB2
R
1
PINB1
R
0
PINB0
R
0x03 (0x23)
Read/Write
Initial Value
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
PORTC – The Port C Data Register
Bit
7
–
6
PORTC6
R/W
0
5
PORTC5
R/W
0
4
PORTC4
R/W
0
3
PORTC3
R/W
0
2
PORTC2
R/W
0
1
PORTC1
R/W
0
0
PORTC0
R/W
0
PORTC
DDRC
PINC
0x08 (0x28)
Read/Write
Initial Value
R
0
DDRC – The Port C Data Direction Register
Bit
7
–
6
DDC6
R/W
0
5
DDC5
R/W
0
4
DDC4
R/W
0
3
DDC3
R/W
0
2
DDC2
R/W
0
1
DDC1
R/W
0
0
DDC0
R/W
0
0x07 (0x27)
Read/Write
Initial Value
R
0
PINC – The Port C Input Pins Address
Bit
7
–
6
PINC6
R
5
PINC5
R
4
PINC4
R
3
PINC3
R
2
PINC2
R
1
PINC1
R
0
PINC0
R
0x06 (0x26)
Read/Write
Initial Value
R
0
N/A
N/A
N/A
N/A
N/A
N/A
N/A
88
ATmega48/88/168
2545M–AVR–09/07
ATMEL [ ATMEL ]
