ATmega48/88/168
Address Labels Code
Comments
;
.org 0x1C00
0x1C00
0x1C02
0x1C04
...
jmp
jmp
jmp
...
jmp
RESET
; Reset handler
EXT_INT0
EXT_INT1
...
; IRQ0 Handler
; IRQ1 Handler
;
0x1C32
;
SPM_RDY
; Store Program Memory Ready Handler
0x1C33 RESET: ldi
r16,high(RAMEND); Main program start
0x1C34
0x1C35
out
ldi
SPH,r16
; Set Stack Pointer to top of RAM
r16,low(RAMEND)
SPL,r16
0x1C36
0x1C37
out
sei
; Enable interrupts
0x1C38
<instr> xxx
11.4.1
Moving Interrupts Between Application and Boot Space, ATmega88 and ATmega168
The MCU Control Register controls the placement of the Interrupt Vector table.
11.5 Register Description
11.5.1
MCUCR – MCU Control Register
Bit
7
–
6
–
5
–
4
3
–
2
–
1
IVSEL
R/W
0
0
IVCE
R/W
0
0x35 (0x55)
Read/Write
Initial Value
PUD
R/W
0
MCUCR
R
0
R
0
R
0
R
0
R
0
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section “Boot Loader Support – Read-While-Write
Self-Programming, ATmega88 and ATmega168” on page 270 for details. To avoid unintentional
changes of Interrupt Vector tables, a special write procedure must be followed to change the
IVSEL bit:
a. Write the Interrupt Vector Change Enable (IVCE) bit to one.
b. Within four cycles, write the desired value to IVSEL while writing a zero to IVCE.
Interrupts will automatically be disabled while this sequence is executed. Interrupts are disabled
in the cycle IVCE is set, and they remain disabled until after the instruction following the write to
IVSEL. If IVSEL is not written, interrupts remain disabled for four cycles. The I-bit in the Status
Register is unaffected by the automatic disabling.
Note:
If Interrupt Vectors are placed in the Boot Loader section and Boot Lock bit BLB02 is programmed,
interrupts are disabled while executing from the Application section. If Interrupt Vectors are placed
in the Application section and Boot Lock bit BLB12 is programed, interrupts are disabled while
executing from the Boot Loader section. Refer to the section “Boot Loader Support – Read-While-
Write Self-Programming, ATmega88 and ATmega168” on page 270 for details on Boot Lock bits.
This bit is not available in ATmega48.
65
2545M–AVR–09/07
ATMEL [ ATMEL ]
