ATmega8(L)
Changes from Rev.
2486B-12/01 to Rev.
2486C-03/02
All page numbers refers to this document.
1
Updated TWI Chapter.
More details regarding use of the TWI Power-down operation and using the TWI as
Master with low TWBRR values are added into the datasheet.
Added the note at the end of the “Bit Rate Generator Unit” on page 167.
Added the description at the end of “Address Match Unit” on page 167.
2
Updated Description of OSCCAL Calibration Byte.
In the datasheet, it was not explained how to take advantage of the calibration bytes
for 2, 4, and 8 MHz Oscillator selections. This is now added in the following
sections:
Improved description of “Oscillator Calibration Register – OSCCAL” on page 29 and
“Calibration Byte” on page 221.
3
Added Some Preliminary Test Limits and Characterization Data.
Removed some of the TBD’s in the following tables and pages:
Table 3 on page 24, Table 15 on page 36, Table 16 on page 40, Table 17 on page
42, “TA = -40×C to 85×C, VCC = 2.7V to 5.5V (unless otherwise noted)” on page
237, Table 99 on page 239, and Table 102 on page 241.
4
5
Updated Programming Figures.
Figure 104 on page 222 and Figure 112 on page 232 are updated to also reflect that
AVCC must be connected during Programming mode.
Added a Description on how to Enter Parallel Programming Mode if RESET
Pin is Disabled or if External Oscillators are Selected.
Added a note in section “Enter Programming Mode” on page 224.
295
2486M–AVR–12/03
ATMEL [ ATMEL ]
