ATmega8(L)
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCM bit. The
MPCM bit shares the same I/O location as the TXC Flag and this might accidentally be cleared
when using SBI or CBI instructions.
Accessing
UBRRH/UCSRC
Registers
The UBRRH Register shares the same I/O location as the UCSRC Register. Therefore some
special consideration must be taken when accessing this I/O location.
Write Access
When doing a write access of this I/O location, the high bit of the value written, the USART Reg-
ister Select (URSEL) bit, controls which one of the two registers that will be written. If URSEL is
zero during a write operation, the UBRRH value will be updated. If URSEL is one, the UCSRC
setting will be updated.
The following code examples show how to access the two registers.
Assembly Code Examples(1)
...
; Set UBRRH to 2
ldir16,0x02
outUBRRH,r16
...
; Set the USBS and the UCSZ1 bit to one, and
; the remaining bits to zero.
ldir16,(1<<URSEL)|(1<<USBS)|(1<<UCSZ1)
outUCSRC,r16
...
C Code Examples(1)
...
/* Set UBRRH to 2 */
UBRRH = 0x02;
...
/* Set the USBS and the UCSZ1 bit to one, and */
/* the remaining bits to zero. */
UCSRC = (1<<URSEL)|(1<<USBS)|(1<<UCSZ1);
...
Note:
1. See “About Code Examples” on page 8
As the code examples illustrate, write accesses of the two registers are relatively unaffected of
the sharing of I/O location.
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2486AA–AVR–02/2013
ATMEL [ ATMEL ]
