2. Overview
The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in single clock cycle, the
a
ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Figure 2-1. Block Diagram
PF7..0
PK7..0
PJ7..0
PE7..0
VCC
Power
Supervision
POR/ BOD &
RESET
RESET
PORT F (8)
PORT K (8)
PORT J (8)
PORT E (8)
Watchdog
Timer
GND
Analog
Comparat or
A/D
Conver t er
Watchdog
Oscillator
JTAG
USART 0
USART 3
USART 1
USART 2
XTAL1
Oscillator
Circuit s /
Clock
Internal
Bandgap reference
16 bit T/C3
EEPROM
Generat ion
16 bit T/C5
16 bit T/C4
16 bit T/C1
XTAL2
CPU
PORT A (8)
PORT G (6)
PA7..0
PG5..0
FLASH
SPI
SRAM
XRAM
TWI
8 bit T/C0
8 bit T/C2
PC7..0
PORT C (8)
NOTE:
Shaded parts only available
in the 100-pin version.
Completefunctionality for
t he ADC, T/ C4, and T/ C5 only
available in the 100-pin version.
PORT D (8)
PD7..0
PORT B (8)
PORT H (8)
PORT L (8)
PL7..0
PB7..0
PH7..0
The Atmel® AVR® core combines a rich instruction set with 32 general purpose working registers. All the 32 regis-
ters are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in
one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
ATmega640/V-1280/V-1281/V-2560/V-2561/V [SUMMARY]
5
2549QS–AVR–02/2014
ATMEL [ ATMEL ]
