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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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The receive function example reads all the I/O Registers into the Register File before  
any computation is done. This gives an optimal receive buffer utilization since the buffer  
location read will be free to accept new data as early as possible.  
Receive Compete Flag and  
Interrupt  
The USART Receiver has one flag that indicates the Receiver state.  
The Receive Complete (RXCn) Flag indicates if there are unread data present in the  
receive buffer. This flag is one when unread data exist in the receive buffer, and zero  
when the receive buffer is empty (i.e., does not contain any unread data). If the Receiver  
is disabled (RXENn = 0), the receive buffer will be flushed and consequently the RXCn  
bit will become zero.  
When the Receive Complete Interrupt Enable (RXCIEn) in UCSRnB is set, the USART  
Receive Complete interrupt will be executed as long as the RXCn Flag is set (provided  
that global interrupts are enabled). When interrupt-driven data reception is used, the  
receive complete routine must read the received data from UDRn in order to clear the  
RXCn Flag, otherwise a new interrupt will occur once the interrupt routine terminates.  
Receiver Error Flags  
The USART Receiver has three Error Flags: Frame Error (FEn), Data OverRun (DORn)  
and Parity Error (UPEn). All can be accessed by reading UCSRnA. Common for the  
Error Flags is that they are located in the receive buffer together with the frame for which  
they indicate the error status. Due to the buffering of the Error Flags, the UCSRnA must  
be read before the receive buffer (UDRn), since reading the UDRn I/O location changes  
the buffer read location. Another equality for the Error Flags is that they can not be  
altered by software doing a write to the flag location. However, all flags must be set to  
zero when the UCSRnA is written for upward compatibility of future USART implementa-  
tions. None of the Error Flags can generate interrupts.  
The Frame Error (FEn) Flag indicates the state of the first stop bit of the next readable  
frame stored in the receive buffer. The FEn Flag is zero when the stop bit was correctly  
read (as one), and the FEn Flag will be one when the stop bit was incorrect (zero). This  
flag can be used for detecting out-of-sync conditions, detecting break conditions and  
protocol handling. The FEn Flag is not affected by the setting of the USBSn bit in UCS-  
RnC since the Receiver ignores all, except for the first, stop bits. For compatibility with  
future devices, always set this bit to zero when writing to UCSRnA.  
The Data OverRun (DORn) Flag indicates data loss due to a receiver buffer full condi-  
tion. A Data OverRun occurs when the receive buffer is full (two characters), it is a new  
character waiting in the Receive Shift Register, and a new start bit is detected. If the  
DORn Flag is set there was one or more serial frame lost between the frame last read  
from UDRn, and the next frame read from UDRn. For compatibility with future devices,  
always write this bit to zero when writing to UCSRnA. The DORn Flag is cleared when  
the frame received was successfully moved from the Shift Register to the receive buffer.  
The Parity Error (UPEn) Flag indicates that the next frame in the receive buffer had a  
Parity Error when received. If Parity Check is not enabled the UPEn bit will always be  
read zero. For compatibility with future devices, always set this bit to zero when writing  
to UCSRnA. For more details see “Parity Bit Calculation” on page 166 and “Parity  
Checker” on page 175.  
174  
ATmega48/88/168  
2545D–AVR–07/04  
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