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ATMEGA48PA-CCU 参数 Datasheet PDF下载

ATMEGA48PA-CCU图片预览
型号: ATMEGA48PA-CCU
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 20MHz, CMOS, PBGA32, 4 X 4 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, GREEN, PLASTIC, UFBGA-32]
分类和应用: 闪存微控制器
文件页数/大小: 349 页 / 2752 K
品牌: ATMEL [ ATMEL ]
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Figure 9. Program Memory Map, ATmega88 and ATmega168  
Program Memory  
0x0000  
Application Flash Section  
Boot Flash Section  
0x0FFF/0x1FFF  
SRAM Data Memory  
Figure 10 shows how the ATmega48/88/168 SRAM Memory is organized.  
The ATmega48/88/168 is a complex microcontroller with more peripheral units than can  
be supported within the 64 locations reserved in the Opcode for the IN and OUT instruc-  
tions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD and  
LD/LDS/LDD instructions can be used.  
The lower 768/1280/1280 data memory locations address both the Register File, the I/O  
memory, Extended I/O memory, and the internal data SRAM. The first 32 locations  
address the Register File, the next 64 location the standard I/O memory, then 160 loca-  
tions of Extended I/O memory, and the next 512/1024/1024 locations address the  
internal data SRAM.  
The five different addressing modes for the data memory cover: Direct, Indirect with Dis-  
placement, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In  
the Register File, registers R26 to R31 feature the indirect addressing pointer registers.  
The direct addressing reaches the entire data space.  
The Indirect with Displacement mode reaches 63 address locations from the base  
address given by the Y- or Z-register.  
When using register indirect addressing modes with automatic pre-decrement and post-  
increment, the address registers X, Y, and Z are decremented or incremented.  
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Regis-  
ters, and the 512/1024/1024 bytes of internal data SRAM in the ATmega48/88/168 are  
all accessible through all these addressing modes. The Register File is described in  
“General Purpose Register File” on page 10.  
16  
ATmega48/88/168  
2545D–AVR–07/04  
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