Timer/Counter Prescaler Figure 65. Prescaler for Timer/Counter2
clkI/O
clkT2S
10-BIT T/C PRESCALER
Clear
TOSC1
AS2
PSRASY
0
CS20
CS21
CS22
TIMER/COUNTER2 CLOCK SOURCE
clkT2
The clock source for Timer/Counter2 is named clkT2S. clkT2S is by default connected to
the main system I/O clock clkIO. By setting the AS2 bit in ASSR, Timer/Counter2 is asyn-
chronously clocked from the TOSC1 pin. This enables use of Timer/Counter2 as a Real
Time Counter (RTC). When AS2 is set, pins TOSC1 and TOSC2 are disconnected from
Port C. A crystal can then be connected between the TOSC1 and TOSC2 pins to serve
as an independent clock source for Timer/Counter2. The Oscillator is optimized for use
with a 32.768 kHz crystal. Applying an external clock source to TOSC1 is not
recommended.
For Timer/Counter2, the possible prescaled selections are: clkT2S/8, clkT2S/32, clkT2S/64,
clkT2S/128, clkT2S/256, and clkT2S/1024. Additionally, clkT2S as well as 0 (stop) may be
selected. Setting the PSRASY bit in GTCCR resets the prescaler. This allows the user
to operate with a predictable prescaler.
General Timer/Counter
Control Register – GTCCR
Bit
7
6
–
5
–
4
–
3
–
2
–
1
0
TSM
R/W
0
PSRASY PSRSYNC GTCCR
Read/Write
Initial Value
R
0
R
0
R
0
R
0
R
0
R/W
0
R/W
0
• Bit 1 – PSRASY: Prescaler Reset Timer/Counter2
When this bit is one, the Timer/Counter2 prescaler will be reset. This bit is normally
cleared immediately by hardware. If the bit is written when Timer/Counter2 is operating
in asynchronous mode, the bit will remain one until the prescaler has been reset. The bit
will not be cleared by hardware if the TSM bit is set. Refer to the description of the “Bit 7
– TSM: Timer/Counter Synchronization Mode” on page 103 for a description of the
Timer/Counter Synchronization mode.
152
ATmega48/88/168
2545D–AVR–07/04
ATMEL [ ATMEL ]
