ATmega32(L)
8-bit Timer/Counter0 Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module.
The main features are:
• Single Compare Unit Counter
with PWM
• Clear Timer on Compare Match (Auto Reload)
• Glitch-free, Phase Correct Pulse Width Modulator (PWM)
• Frequency Generator
• External Event Counter
• 10-bit Clock Prescaler
• Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)
Overview
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 27. For the
actual placement of I/O pins, refer to “Pinout ATmega32” on page 2. CPU accessible I/O
Registers, including I/O bits and I/O pins, are shown in bold. The device-specific I/O
Register and bit locations are listed in the “8-bit Timer/Counter Register Description” on
page 80.
Figure 27. 8-bit Timer/Counter Block Diagram
TCCRn
count
TOVn
(Int.Req.)
clear
Control Logic
TOP
Clock Select
direction
clk
Tn
Edge
Detector
Tn
BOTTOM
( From Prescaler )
Timer/Counter
TCNTn
= 0
= 0xFF
OCn
(Int.Req.)
Waveform
Generation
OCn
=
OCRn
Registers
The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers.
Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer
Interrupt Flag Register (TIFR). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK). TIFR and TIMSK are not shown in the figure since
these registers are shared by other timer units.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the T0 pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the Clock Select logic is
referred to as the timer clock (clkT0).
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2503J–AVR–10/06
ATMEL [ ATMEL ]
