欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA32L-8AUR 参数 Datasheet PDF下载

ATMEGA32L-8AUR图片预览
型号: ATMEGA32L-8AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 8MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44]
分类和应用: 闪存微控制器
文件页数/大小: 347 页 / 3171 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第40页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第41页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第42页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第43页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第45页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第46页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第47页浏览型号ATMEGA32L-8AUR的Datasheet PDF文件第48页  
Interrupts  
This section describes the specifics of the interrupt handling as performed in  
ATmega32. For a general explanation of the AVR interrupt handling, refer to “Reset and  
Interrupt Handling” on page 13.  
Interrupt Vectors in  
ATmega32  
Table 18. Reset and Interrupt Vectors  
Program  
Vector No. Address(2)  
Source  
Interrupt Definition  
1
$000(1)  
RESET  
External Pin, Power-on Reset, Brown-out  
Reset, Watchdog Reset, and JTAG AVR  
Reset  
2
3
$002  
$004  
$006  
$008  
$00A  
$00C  
$00E  
$010  
$012  
$014  
$016  
$018  
$01A  
$01C  
$01E  
$020  
$022  
$024  
$026  
$028  
INT0  
INT1  
External Interrupt Request 0  
External Interrupt Request 1  
External Interrupt Request 2  
Timer/Counter2 Compare Match  
Timer/Counter2 Overflow  
4
INT2  
5
TIMER2 COMP  
TIMER2 OVF  
TIMER1 CAPT  
6
7
Timer/Counter1 Capture Event  
8
TIMER1 COMPA Timer/Counter1 Compare Match A  
TIMER1 COMPB Timer/Counter1 Compare Match B  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
TIMER1 OVF  
TIMER0 COMP  
TIMER0 OVF  
SPI, STC  
Timer/Counter1 Overflow  
Timer/Counter0 Compare Match  
Timer/Counter0 Overflow  
Serial Transfer Complete  
USART, Rx Complete  
USART, RXC  
USART, UDRE  
USART, TXC  
ADC  
USART Data Register Empty  
USART, Tx Complete  
ADC Conversion Complete  
EEPROM Ready  
EE_RDY  
ANA_COMP  
TWI  
Analog Comparator  
Two-wire Serial Interface  
Store Program Memory Ready  
SPM_RDY  
Notes: 1. When the BOOTRST fuse is programmed, the device will jump to the Boot Loader  
address at reset, see “Boot Loader Support – Read-While-Write Self-Programming”  
on page 244.  
2. When the IVSEL bit in GICR is set, interrupt vectors will be moved to the start of the  
Boot Flash section. The address of each Interrupt Vector will then be the address in  
this table added to the start address of the Boot Flash section.  
Table 19 shows Reset and Interrupt Vectors placement for the various combinations of  
BOOTRST and IVSEL settings. If the program never enables an interrupt source, the  
Interrupt Vectors are not used, and regular program code can be placed at these loca-  
tions. This is also the case if the Reset Vector is in the Application section while the  
Interrupt Vectors are in the Boot section or vice versa.  
44  
ATmega32(L)  
2503J–AVR–10/06  
 复制成功!