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ATMEGA32L-8AUR 参数 Datasheet PDF下载

ATMEGA32L-8AUR图片预览
型号: ATMEGA32L-8AUR
PDF下载: 下载PDF文件 查看货源
内容描述: [RISC Microcontroller, 8-Bit, FLASH, AVR RISC CPU, 8MHz, CMOS, PQFP44, 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44]
分类和应用: 闪存微控制器
文件页数/大小: 347 页 / 3171 K
品牌: ATMEL [ ATMEL ]
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ATmega32(L)  
Figure 88. Data Transfer in Master Receiver Mode  
VCC  
Device 1  
MASTER  
RECEIVER  
Device 2  
SLAVE  
TRANSMITTER  
Device 3  
Device n  
R1  
R2  
........  
SDA  
SCL  
A START condition is sent by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
1
0
X
1
0
X
TWEN must be written to one to enable the Two-wire Serial Interface, TWSTA must be  
written to one to transmit a START condition and TWINT must be set to clear the TWINT  
Flag. The TWI will then test the Two-wire Serial Bus and generate a START condition as  
soon as the bus becomes free. After a START condition has been transmitted, the  
TWINT Flag is set by hardware, and the status code in TWSR will be $08 (See Table  
74). In order to enter MR mode, SLA+R must be transmitted. This is done by writing  
SLA+R to TWDR. Thereafter the TWINT bit should be cleared (by writing it to one) to  
continue the transfer. This is accomplished by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
0
0
X
1
0
X
When SLA+R have been transmitted and an acknowledgement bit has been received,  
TWINT is set again and a number of status codes in TWSR are possible. Possible sta-  
tus codes in master mode are $38, $40, or $48. The appropriate action to be taken for  
each of these status codes is detailed in Table 75. Received data can be read from the  
TWDR Register when the TWINT Flag is set high by hardware. This scheme is repeated  
until the last byte has been received. After the last byte has been received, the MR  
should inform the ST by sending a NACK after the last received data byte. The transfer  
is ended by generating a STOP condition or a repeated START condition. A STOP con-  
dition is generated by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
0
1
X
1
0
X
A REPEATED START condition is generated by writing the following value to TWCR:  
TWCR  
TWINT  
TWEA  
TWSTA  
TWSTO  
TWWC  
TWEN  
TWIE  
Value  
1
X
1
0
X
1
0
X
After a repeated START condition (state $10) the Two-wire Serial Interface can access  
the same slave again, or a new slave without transmitting a STOP condition. Repeated  
START enables the master to switch between slaves, Master Transmitter mode and  
Master Receiver mode without losing control over the bus.  
187  
2503J–AVR–10/06  
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