Alternate Functions of Port C The Port C pins with alternate functions are shown in Table 28. If the JTAG interface is
enabled, the pull-up resistors on pins PC5(TDI), PC3(TMS) and PC2(TCK) will be acti-
vated even if a reset occurs.
Table 28. Port C Pins Alternate Functions
Port Pin
PC7
Alternate Function
TOSC2 (Timer Oscillator Pin 2)
TOSC1 (Timer Oscillator Pin 1)
TDI (JTAG Test Data In)
PC6
PC5
PC4
TDO (JTAG Test Data Out)
PC3
TMS (JTAG Test Mode Select)
TCK (JTAG Test Clock)
PC2
PC1
SDA (Two-wire Serial Bus Data Input/Output Line)
SCL (Two-wire Serial Bus Clock Line)
PC0
The alternate pin configuration is as follows:
• TOSC2 – Port C, Bit 7
TOSC2, Timer Oscillator pin 2: When the AS2 bit in ASSR is set (one) to enable asyn-
chronous clocking of Timer/Counter2, pin PC7 is disconnected from the port, and
becomes the inverting output of the Oscillator amplifier. In this mode, a Crystal Oscillator
is connected to this pin, and the pin can not be used as an I/O pin.
• TOSC1 – Port C, Bit 6
TOSC1, Timer Oscillator pin 1: When the AS2 bit in ASSR is set (one) to enable asyn-
chronous clocking of Timer/Counter2, pin PC6 is disconnected from the port, and
becomes the input of the inverting Oscillator amplifier. In this mode, a Crystal Oscillator
is connected to this pin, and the pin can not be used as an I/O pin.
• TDI – Port C, Bit 5
TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or
Data Register (scan chains). When the JTAG interface is enabled, this pin can not be
used as an I/O pin.
• TDO – Port C, Bit 4
TDO, JTAG Test Data Out: Serial output data from Instruction Register or Data Regis-
ter. When the JTAG interface is enabled, this pin can not be used as an I/O pin.
The TD0 pin is tri-stated unless TAP states that shifts out data are entered.
• TMS – Port C, Bit 3
TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller
state machine. When the JTAG interface is enabled, this pin can not be used as an I/O
pin.
60
ATmega32(L)
2503J–AVR–10/06