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ATMEGA2560 参数 Datasheet PDF下载

ATMEGA2560图片预览
型号: ATMEGA2560
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器与256K字节的系统内可编程闪存 [8- BIT Microcontroller with 256K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 407 页 / 2985 K
品牌: ATMEL [ ATMEL CORPORATION ]
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ATmega640/1280/1281/2560/2561
current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the
ATmega640/1280/1281/2560/2561 as listed on page 94.
Port E (PE7..PE0)
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port E output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port E pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port E also serves the functions of various special features of the
ATmega640/1280/1281/2560/2561 as listed on page 96.
Port F (PF7..PF0)
Port F serves as analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used.
Port pins can provide internal pull-up resistors (selected for each bit). The Port F output
buffers have symmetrical drive characteristics with both high sink and source capability.
As inputs, Port F pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port F pins are tri-stated when a reset condition becomes
active, even if the clock is not running. If the JTAG interface is enabled, the pull-up resis-
tors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be activated even if a reset
occurs.
Port F also serves the functions of the JTAG interface.
Port G (PG5..PG0)
Port G is a 6-bit I/O port with internal pull-up resistors (selected for each bit). The Port G
output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port G pins that are externally pulled low will source current if the
pull-up resistors are activated. The Port G pins are tri-stated when a reset condition
becomes active, even if the clock is not running.
Port G also serves the functions of various special features of the
ATmega640/1280/1281/2560/2561 as listed on page 102.
Port H (PH7..PH0)
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port H output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port H pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port H pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port H also serves the functions of various special features of the
ATmega640/1280/1281/2560/2561 as listed on page 104.
Port J (PJ7..PJ0)
Port J is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port J output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port J pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port J pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port J also serves the functions of various special features of the
ATmega640/1280/1281/2560/2561 as listed on page 106.
Port K (PK7..PK0)
Port K serves as analog inputs to the A/D Converter.
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2549A–AVR–03/05