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ATMEGA16L-8MI 参数 Datasheet PDF下载

ATMEGA16L-8MI图片预览
型号: ATMEGA16L-8MI
PDF下载: 下载PDF文件 查看货源
内容描述: 8位AVR微控制器具有16K字节的系统内可编程闪存 [8-bit AVR Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器和处理器外围集成电路异步传输模式ATM时钟
文件页数/大小: 315 页 / 2880 K
品牌: ATMEL [ ATMEL ]
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Normal Mode  
The simplest mode of operation is the normal mode (WGM01:0 = 0). In this mode the  
counting direction is always up (incrementing), and no counter clear is performed. The  
counter simply overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then  
restarts from the bottom (0x00). In normal operation the Timer/Counter Overflow Flag  
(TOV0) will be set in the same timer clock cycle as the TCNT0 becomes zero. The TOV0  
flag in this case behaves like a ninth bit, except that it is only set, not cleared. However,  
combined with the timer overflow interrupt that automatically clears the TOV0 flag, the  
timer resolution can be increased by software. There are no special cases to consider in  
the normal mode, a new counter value can be written anytime.  
The output compare unit can be used to generate interrupts at some given time. Using  
the output compare to generate waveforms in Normal mode is not recommended, since  
this will occupy too much of the CPU time.  
Clear Timer on Compare  
Match (CTC) Mode  
In Clear Timer on Compare or CTC mode (WGM01:0 = 2), the OCR0 Register is used to  
manipulate the counter resolution. In CTC mode the counter is cleared to zero when the  
counter value (TCNT0) matches the OCR0. The OCR0 defines the top value for the  
counter, hence also its resolution. This mode allows greater control of the compare  
match output frequency. It also simplifies the operation of counting external events.  
The timing diagram for the CTC mode is shown in Figure 31. The counter value  
(TCNT0) increases until a compare match occurs between TCNT0 and OCR0, and then  
counter (TCNT0) is cleared.  
Figure 31. CTC Mode, Timing Diagram  
OCn Interrupt Flag Set  
TCNTn  
OCn  
(Toggle)  
(COMn1:0 = 1)  
1
2
3
4
Period  
An interrupt can be generated each time the counter value reaches the TOP value by  
using the OCF0 flag. If the interrupt is enabled, the interrupt handler routine can be used  
for updating the TOP value. However, changing TOP to a value close to BOTTOM when  
the counter is running with none or a low prescaler value must be done with care since  
the CTC mode does not have the double buffering feature. If the new value written to  
OCR0 is lower than the current value of TCNT0, the counter will miss the compare  
match. The counter will then have to count to its maximum value (0xFF) and wrap  
around starting at 0x00 before the compare match can occur.  
For generating a waveform output in CTC mode, the OC0 output can be set to toggle its  
logical level on each compare match by setting the Compare Output mode bits to toggle  
mode (COM01:0 = 1). The OC0 value will not be visible on the port pin unless the data  
direction for the pin is set to output. The waveform generated will have a maximum fre-  
72  
ATmega16(L)  
2466E–AVR–10/02  
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