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ATMEGA16U2-MUR 参数 Datasheet PDF下载

ATMEGA16U2-MUR图片预览
型号: ATMEGA16U2-MUR
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器具有ISP功能的Flash 8/16 / 32K Butes [8-bit Microcontroller with 8/16/32K Butes of ISP Flash]
分类和应用: 微控制器异步传输模式PCATM
文件页数/大小: 310 页 / 4432 K
品牌: ATMEL [ ATMEL ]
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ATmega8U2/16U2/32U2  
Figure 15-3. Output Compare Unit, Block Diagram  
DATA BUS  
OCRnx  
TCNTn  
= (8-bit Comparator )  
OCFnx (Int.Req.)  
top  
bottom  
FOCn  
Waveform Generator  
OCnx  
WGMn1:0  
COMnX1:0  
The OCR0x Registers are double buffered when using any of the Pulse Width Modulation  
(PWM) modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the dou-  
ble buffering is disabled. The double buffering synchronizes the update of the OCR0x Compare  
Registers to either top or bottom of the counting sequence. The synchronization prevents the  
occurrence of odd-length, non-symmetrical PWM pulses, thereby making the output glitch-free.  
The OCR0x Register access may seem complex, but this is not case. When the double buffering  
is enabled, the CPU has access to the OCR0x Buffer Register, and if double buffering is dis-  
abled the CPU will access the OCR0x directly.  
15.5.1  
Force Output Compare  
In non-PWM waveform generation modes, the match output of the comparator can be forced by  
writing a one to the Force Output Compare (FOC0x) bit. Forcing Compare Match will not set the  
OCF0x Flag or reload/clear the timer, but the OC0x pin will be updated as if a real Compare  
Match had occurred (the COM0x1:0 bits settings define whether the OC0x pin is set, cleared or  
toggled).  
15.5.2  
15.5.3  
Compare Match Blocking by TCNT0 Write  
All CPU write operations to the TCNT0 Register will block any Compare Match that occur in the  
next timer clock cycle, even when the timer is stopped. This feature allows OCR0x to be initial-  
ized to the same value as TCNT0 without triggering an interrupt when the Timer/Counter clock is  
enabled.  
Using the Output Compare Unit  
Since writing TCNT0 in any mode of operation will block all Compare Matches for one timer  
clock cycle, there are risks involved when changing TCNT0 when using the Output Compare  
Unit, independently of whether the Timer/Counter is running or not. If the value written to TCNT0  
equals the OCR0x value, the Compare Match will be missed, resulting in incorrect waveform  
94  
7799D–AVR–11/10  
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