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ATMEGA169PV 参数 Datasheet PDF下载

ATMEGA169PV图片预览
型号: ATMEGA169PV
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有16K字节的系统内可编程闪存 [Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 390 页 / 3485 K
品牌: ATMEL [ ATMEL ]
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ATmega169P  
• OC1B/PCINT14, Bit 6  
OC1B, Output Compare Match B output: The PB6 pin can serve as an external output for the  
Timer/Counter1 Output Compare B. The pin has to be configured as an output (DDB6 set (one))  
to serve this function. The OC1B pin is also the output pin for the PWM mode timer function.  
PCINT14, Pin Change Interrupt Source 14: The PB6 pin can serve as an external interrupt  
source.  
• OC1A/PCINT13, Bit 5  
OC1A, Output Compare Match A output: The PB5 pin can serve as an external output for the  
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDB5 set (one))  
to serve this function. The OC1A pin is also the output pin for the PWM mode timer function.  
PCINT13, Pin Change Interrupt Source 13: The PB5 pin can serve as an external interrupt  
source.  
• OC0A/PCINT12, Bit 4  
OC0A, Output Compare Match A output: The PB4 pin can serve as an external output for the  
Timer/Counter0 Output Compare A. The pin has to be configured as an output (DDB4 set (one))  
to serve this function. The OC0A pin is also the output pin for the PWM mode timer function.  
PCINT12, Pin Change Interrupt Source 12: The PB4 pin can serve as an external interrupt  
source.  
• MISO/PCINT11 – Port B, Bit 3  
MISO: Master Data input, Slave Data output pin for SPI. When the SPI is enabled as a Master,  
this pin is configured as an input regardless of the setting of DDB3. When the SPI is enabled as  
a Slave, the data direction of this pin is controlled by DDB3. When the pin is forced to be an  
input, the pull-up can still be controlled by the PORTB3 bit.  
PCINT11, Pin Change Interrupt Source 11: The PB3 pin can serve as an external interrupt  
source.  
• MOSI/PCINT10 – Port B, Bit 2  
MOSI: SPI Master Data output, Slave Data input for SPI. When the SPI is enabled as a Slave,  
this pin is configured as an input regardless of the setting of DDB2. When the SPI is enabled as  
a Master, the data direction of this pin is controlled by DDB2. When the pin is forced to be an  
input, the pull-up can still be controlled by the PORTB2 bit.  
PCINT10, Pin Change Interrupt Source 10: The PB2 pin can serve as an external interrupt  
source.  
• SCK/PCINT9 – Port B, Bit 1  
SCK: Master Clock output, Slave Clock input pin for SPI. When the SPI is enabled as a Slave,  
this pin is configured as an input regardless of the setting of DDB1. When the SPI is enabled as  
a Master, the data direction of this pin is controlled by DDB1. When the pin is forced to be an  
input, the pull-up can still be controlled by the PORTB1 bit.  
PCINT9, Pin Change Interrupt Source 9: The PB1 pin can serve as an external interrupt source.  
• SS/PCINT8 – Port B, Bit 0  
SS: Slave Port Select input. When the SPI is enabled as a Slave, this pin is configured as an  
input regardless of the setting of DDB0. As a Slave, the SPI is activated when this pin is driven  
75  
8018A–AVR–03/06  
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