欢迎访问ic37.com |
会员登录 免费注册
发布采购

ATMEGA169PV-8AU 参数 Datasheet PDF下载

ATMEGA169PV-8AU图片预览
型号: ATMEGA169PV-8AU
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器,带有16K字节的系统内可编程闪存 [Microcontroller with 16K Bytes In-System Programmable Flash]
分类和应用: 闪存微控制器
文件页数/大小: 390 页 / 3485 K
品牌: ATMEL [ ATMEL ]
 浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第26页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第27页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第28页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第29页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第31页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第32页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第33页浏览型号ATMEGA169PV-8AU的Datasheet PDF文件第34页  
7.1.4  
Asynchronous Timer Clock – clkASY  
The Asynchronous Timer clock allows the Asynchronous Timer/Counter and the LCD controller  
to be clocked directly from an external clock or an external 32 kHz clock crystal. The dedicated  
clock domain allows using this Timer/Counter as a real-time counter even when the device is in  
sleep mode. It also allows the LCD controller output to continue while the rest of the device is in  
sleep mode.  
7.1.5  
ADC Clock – clkADC  
The ADC is provided with a dedicated clock domain. This allows halting the CPU and I/O clocks  
in order to reduce noise generated by digital circuitry. This gives more accurate ADC conversion  
results.  
7.2  
Clock Sources  
The device has the following clock source options, selectable by Flash Fuse bits as shown  
below. The clock from the selected source is input to the AVR clock generator, and routed to the  
appropriate modules.  
Table 7-1.  
Device Clocking Options Select(1)  
Device Clocking Option  
External Crystal/Ceramic Resonator  
External Low-frequency Crystal  
Calibrated Internal RC Oscillator  
External Clock  
CKSEL3:0  
1111 - 1000  
0111 - 0110  
0010  
0000  
Reserved  
0011, 0001, 0101, 0100  
Note:  
1. For all fuses “1” means unprogrammed while “0” means programmed.  
The various choices for each clocking option is given in the following sections. When the CPU  
wakes up from Power-down or Power-save, the selected clock source is used to time the start-  
up, ensuring stable Oscillator operation before instruction execution starts. When the CPU starts  
from reset, there is an additional delay allowing the power to reach a stable level before com-  
mencing normal operation. The Watchdog Oscillator is used for timing this real-time part of the  
start-up time. The number of WDT Oscillator cycles used for each time-out is shown in Table 7-  
2. The frequency of the Watchdog Oscillator is voltage dependent as shown in ”Typical Charac-  
teristics” on page 335.  
Table 7-2.  
Typ Time-out (VCC = 5.0V)  
4.1 ms  
65 ms  
Number of Watchdog Oscillator Cycles  
Typ Time-out (VCC = 3.0V)  
4.3 ms  
69 ms  
Number of Cycles  
4K (4,096)  
64K (65,536)  
30  
ATmega169P  
8018A–AVR–03/06  
 复制成功!